atomic.cc (8850:ed91b534ed04) atomic.cc (8921:e53972f72165)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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75 return BaseCPU::getPort(if_name, idx);
76 }
77}
78
79void
80AtomicSimpleCPU::init()
81{
82 BaseCPU::init();
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 66 unchanged lines hidden (view full) ---

75 return BaseCPU::getPort(if_name, idx);
76 }
77}
78
79void
80AtomicSimpleCPU::init()
81{
82 BaseCPU::init();
83
84 // Initialise the ThreadContext's memory proxies
85 tcBase()->initMemProxies(tcBase());
86
83 if (FullSystem) {
84 ThreadID size = threadContexts.size();
85 for (ThreadID i = 0; i < size; ++i) {
86 ThreadContext *tc = threadContexts[i];
87 // initialize CPU, including PC
88 TheISA::initCPU(tc, tc->contextId());
89 }
90 }
91
87 if (FullSystem) {
88 ThreadID size = threadContexts.size();
89 for (ThreadID i = 0; i < size; ++i) {
90 ThreadContext *tc = threadContexts[i];
91 // initialize CPU, including PC
92 TheISA::initCPU(tc, tc->contextId());
93 }
94 }
95
92 // Initialise the ThreadContext's memory proxies
93 tcBase()->initMemProxies(tcBase());
94
95 if (hasPhysMemPort) {
96 AddrRangeList pmAddrList = physmemPort.getPeer()->getAddrRanges();
97 physMemAddr = *pmAddrList.begin();
98 }
99 // Atomic doesn't do MT right now, so contextId == threadId
100 ifetch_req.setThreadContext(_cpuId, 0); // Add thread ID if we add MT
101 data_read_req.setThreadContext(_cpuId, 0); // Add thread ID here too
102 data_write_req.setThreadContext(_cpuId, 0); // Add thread ID here too

--- 461 unchanged lines hidden --- 		96 if (hasPhysMemPort) {
97 AddrRangeList pmAddrList = physmemPort.getPeer()->getAddrRanges();
98 physMemAddr = *pmAddrList.begin();
99 }
100 // Atomic doesn't do MT right now, so contextId == threadId
101 ifetch_req.setThreadContext(_cpuId, 0); // Add thread ID if we add MT
102 data_read_req.setThreadContext(_cpuId, 0); // Add thread ID here too
103 data_write_req.setThreadContext(_cpuId, 0); // Add thread ID here too

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