atomic.cc (7720:65d338a8dba4) atomic.cc (7823:dac01f14f20f)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 253 unchanged lines hidden (view full) ---

262
263 assert(_status == Idle);
264 assert(!tickEvent.scheduled());
265
266 notIdleFraction++;
267 numCycles += tickToCycles(thread->lastActivate - thread->lastSuspend);
268
269 //Make sure ticks are still on multiples of cycles
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 253 unchanged lines hidden (view full) ---

262
263 assert(_status == Idle);
264 assert(!tickEvent.scheduled());
265
266 notIdleFraction++;
267 numCycles += tickToCycles(thread->lastActivate - thread->lastSuspend);
268
269 //Make sure ticks are still on multiples of cycles
270 schedule(tickEvent, nextCycle(curTick + ticks(delay)));
270 schedule(tickEvent, nextCycle(curTick() + ticks(delay)));
271 _status = Running;
272}
273
274
275void
276AtomicSimpleCPU::suspendContext(int thread_num)
277{
278 DPRINTF(SimpleCPU, "SuspendContext %d\n", thread_num);

--- 447 unchanged lines hidden (view full) ---

726 advancePC(fault);
727 }
728
729 // instruction takes at least one cycle
730 if (latency < ticks(1))
731 latency = ticks(1);
732
733 if (_status != Idle)
271 _status = Running;
272}
273
274
275void
276AtomicSimpleCPU::suspendContext(int thread_num)
277{
278 DPRINTF(SimpleCPU, "SuspendContext %d\n", thread_num);

--- 447 unchanged lines hidden (view full) ---

726 advancePC(fault);
727 }
728
729 // instruction takes at least one cycle
730 if (latency < ticks(1))
731 latency = ticks(1);
732
733 if (_status != Idle)
734 schedule(tickEvent, curTick + latency);
734 schedule(tickEvent, curTick() + latency);
735}
736
737
738void
739AtomicSimpleCPU::printAddr(Addr a)
740{
741 dcachePort.printAddr(a);
742}

--- 16 unchanged lines hidden --- 		735}
736
737
738void
739AtomicSimpleCPU::printAddr(Addr a)
740{
741 dcachePort.printAddr(a);
742}

--- 16 unchanged lines hidden ---