atomic.cc (5712:199d31b47f7b) | atomic.cc (5714:76abee886def) |
---|---|
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 70 unchanged lines hidden (view full) --- 79AtomicSimpleCPU::init() 80{ 81 BaseCPU::init(); 82#if FULL_SYSTEM 83 for (int i = 0; i < threadContexts.size(); ++i) { 84 ThreadContext *tc = threadContexts[i]; 85 86 // initialize CPU, including PC | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 70 unchanged lines hidden (view full) --- 79AtomicSimpleCPU::init() 80{ 81 BaseCPU::init(); 82#if FULL_SYSTEM 83 for (int i = 0; i < threadContexts.size(); ++i) { 84 ThreadContext *tc = threadContexts[i]; 85 86 // initialize CPU, including PC |
87 TheISA::initCPU(tc, _cpuId); | 87 TheISA::initCPU(tc, tc->contextId()); |
88 } 89#endif 90 if (hasPhysMemPort) { 91 bool snoop = false; 92 AddrRangeList pmAddrList; 93 physmemPort.getPeerAddressRanges(pmAddrList, snoop); 94 physMemAddr = *pmAddrList.begin(); 95 } | 88 } 89#endif 90 if (hasPhysMemPort) { 91 bool snoop = false; 92 AddrRangeList pmAddrList; 93 physmemPort.getPeerAddressRanges(pmAddrList, snoop); 94 physMemAddr = *pmAddrList.begin(); 95 } |
96 // Atomic doesn't do MT right now, so contextId == threadId |
|
96 ifetch_req.setThreadContext(_cpuId, 0); // Add thread ID if we add MT 97 data_read_req.setThreadContext(_cpuId, 0); // Add thread ID here too 98 data_write_req.setThreadContext(_cpuId, 0); // Add thread ID here too 99} 100 101bool 102AtomicSimpleCPU::CpuPort::recvTiming(PacketPtr pkt) 103{ --- 725 unchanged lines hidden --- | 97 ifetch_req.setThreadContext(_cpuId, 0); // Add thread ID if we add MT 98 data_read_req.setThreadContext(_cpuId, 0); // Add thread ID here too 99 data_write_req.setThreadContext(_cpuId, 0); // Add thread ID here too 100} 101 102bool 103AtomicSimpleCPU::CpuPort::recvTiming(PacketPtr pkt) 104{ --- 725 unchanged lines hidden --- |