atomic.cc (5101:8af5a6a6223d) atomic.cc (5169:bfd18d401251)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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154 icachePort(name() + "-iport", this), dcachePort(name() + "-iport", this),
155 physmemPort(name() + "-iport", this), hasPhysMemPort(false)
156{
157 _status = Idle;
158
159 icachePort.snoopRangeSent = false;
160 dcachePort.snoopRangeSent = false;
161
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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154 icachePort(name() + "-iport", this), dcachePort(name() + "-iport", this),
155 physmemPort(name() + "-iport", this), hasPhysMemPort(false)
156{
157 _status = Idle;
158
159 icachePort.snoopRangeSent = false;
160 dcachePort.snoopRangeSent = false;
161
162 ifetch_req.setThreadContext(p->cpu_id, 0); // Add thread ID if we add MT
163 data_read_req.setThreadContext(p->cpu_id, 0); // Add thread ID here too
164 data_write_req.setThreadContext(p->cpu_id, 0); // Add thread ID here too
162 ifetch_req.setThreadContext(cpuId, 0); // Add thread ID if we add MT
163 data_read_req.setThreadContext(cpuId, 0); // Add thread ID here too
164 data_write_req.setThreadContext(cpuId, 0); // Add thread ID here too
165}
166
167
168AtomicSimpleCPU::~AtomicSimpleCPU()
169{
170}
171
172void

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232 _status = Running;
233 tickEvent.schedule(nextCycle());
234 break;
235 }
236 }
237 if (_status != Running) {
238 _status = Idle;
239 }
165}
166
167
168AtomicSimpleCPU::~AtomicSimpleCPU()
169{
170}
171
172void

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232 _status = Running;
233 tickEvent.schedule(nextCycle());
234 break;
235 }
236 }
237 if (_status != Running) {
238 _status = Idle;
239 }
240 assert(threadContexts.size() == 1);
241 cpuId = tc->readCpuId();
240}
241
242
243void
244AtomicSimpleCPU::activateContext(int thread_num, int delay)
245{
246 DPRINTF(SimpleCPU, "ActivateContext %d (%d cycles)\n", thread_num, delay);
247

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243
244
245void
246AtomicSimpleCPU::activateContext(int thread_num, int delay)
247{
248 DPRINTF(SimpleCPU, "ActivateContext %d (%d cycles)\n", thread_num, delay);
249

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