atomic.cc (5018:21795007349e) atomic.cc (5100:7a0180040755)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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249 assert(thread);
250
251 assert(_status == Idle);
252 assert(!tickEvent.scheduled());
253
254 notIdleFraction++;
255
256 //Make sure ticks are still on multiples of cycles
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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249 assert(thread);
250
251 assert(_status == Idle);
252 assert(!tickEvent.scheduled());
253
254 notIdleFraction++;
255
256 //Make sure ticks are still on multiples of cycles
257 tickEvent.schedule(nextCycle(curTick + cycles(delay)));
257 tickEvent.schedule(nextCycle(curTick + ticks(delay)));
258 _status = Running;
259}
260
261
262void
263AtomicSimpleCPU::suspendContext(int thread_num)
264{
265 DPRINTF(SimpleCPU, "SuspendContext %d\n", thread_num);

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579}
580
581
582void
583AtomicSimpleCPU::tick()
584{
585 DPRINTF(SimpleCPU, "Tick\n");
586
258 _status = Running;
259}
260
261
262void
263AtomicSimpleCPU::suspendContext(int thread_num)
264{
265 DPRINTF(SimpleCPU, "SuspendContext %d\n", thread_num);

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579}
580
581
582void
583AtomicSimpleCPU::tick()
584{
585 DPRINTF(SimpleCPU, "Tick\n");
586
587 Tick latency = cycles(1); // instruction takes one cycle by default
587 Tick latency = ticks(1); // instruction takes one cycle by default
588
589 for (int i = 0; i < width; ++i) {
590 numCycles++;
591
592 if (!curStaticInst || !curStaticInst->isDelayedCommit())
593 checkForInterrupts();
594
595 Fault fault = setupFetchRequest(&ifetch_req);

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637
638 // @todo remove me after debugging with legion done
639 if (curStaticInst && (!curStaticInst->isMicroop() ||
640 curStaticInst->isFirstMicroop()))
641 instCnt++;
642
643 if (simulate_stalls) {
644 Tick icache_stall =
588
589 for (int i = 0; i < width; ++i) {
590 numCycles++;
591
592 if (!curStaticInst || !curStaticInst->isDelayedCommit())
593 checkForInterrupts();
594
595 Fault fault = setupFetchRequest(&ifetch_req);

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637
638 // @todo remove me after debugging with legion done
639 if (curStaticInst && (!curStaticInst->isMicroop() ||
640 curStaticInst->isFirstMicroop()))
641 instCnt++;
642
643 if (simulate_stalls) {
644 Tick icache_stall =
645 icache_access ? icache_latency - cycles(1) : 0;
645 icache_access ? icache_latency - ticks(1) : 0;
646 Tick dcache_stall =
646 Tick dcache_stall =
647 dcache_access ? dcache_latency - cycles(1) : 0;
648 Tick stall_cycles = (icache_stall + dcache_stall) / cycles(1);
649 if (cycles(stall_cycles) < (icache_stall + dcache_stall))
650 latency += cycles(stall_cycles+1);
647 dcache_access ? dcache_latency - ticks(1) : 0;
648 Tick stall_cycles = (icache_stall + dcache_stall) / ticks(1);
649 if (ticks(stall_cycles) < (icache_stall + dcache_stall))
650 latency += ticks(stall_cycles+1);
651 else
651 else
652 latency += cycles(stall_cycles);
652 latency += ticks(stall_cycles);
653 }
654
655 }
656 if(fault != NoFault || !stayAtPC)
657 advancePC(fault);
658 }
659
660 if (_status != Idle)

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654
655 }
656 if(fault != NoFault || !stayAtPC)
657 advancePC(fault);
658 }
659
660 if (_status != Idle)

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