atomic.cc (3806:65ae5388c059) atomic.cc (3807:1455bc719432)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 64 unchanged lines hidden (view full) ---

73void
74AtomicSimpleCPU::init()
75{
76 BaseCPU::init();
77#if FULL_SYSTEM
78 for (int i = 0; i < threadContexts.size(); ++i) {
79 ThreadContext *tc = threadContexts[i];
80
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 64 unchanged lines hidden (view full) ---

73void
74AtomicSimpleCPU::init()
75{
76 BaseCPU::init();
77#if FULL_SYSTEM
78 for (int i = 0; i < threadContexts.size(); ++i) {
79 ThreadContext *tc = threadContexts[i];
80
81 // initialize the mem pointers
82 tc->init();
83
84 // initialize CPU, including PC
85 TheISA::initCPU(tc, tc->readCpuId());
86 }
87#endif
88}
89
90bool
91AtomicSimpleCPU::CpuPort::recvTiming(PacketPtr pkt)

--- 144 unchanged lines hidden (view full) ---

236{
237 assert(thread_num == 0);
238 assert(thread);
239
240 assert(_status == Idle);
241 assert(!tickEvent.scheduled());
242
243 notIdleFraction++;
81 // initialize CPU, including PC
82 TheISA::initCPU(tc, tc->readCpuId());
83 }
84#endif
85}
86
87bool
88AtomicSimpleCPU::CpuPort::recvTiming(PacketPtr pkt)

--- 144 unchanged lines hidden (view full) ---

233{
234 assert(thread_num == 0);
235 assert(thread);
236
237 assert(_status == Idle);
238 assert(!tickEvent.scheduled());
239
240 notIdleFraction++;
241
242#if FULL_SYSTEM
243 // Connect the ThreadContext's memory ports (Functional/Virtual
244 // Ports)
245 tc->connectMemPorts();
246#endif
247
244 //Make sure ticks are still on multiples of cycles
245 tickEvent.schedule(nextCycle(curTick + cycles(delay)));
246 _status = Running;
247}
248
249
250void
251AtomicSimpleCPU::suspendContext(int thread_num)

--- 365 unchanged lines hidden --- 		248 //Make sure ticks are still on multiples of cycles
249 tickEvent.schedule(nextCycle(curTick + cycles(delay)));
250 _status = Running;
251}
252
253
254void
255AtomicSimpleCPU::suspendContext(int thread_num)

--- 365 unchanged lines hidden ---