atomic.cc (3661:efc80a01aeb6) | atomic.cc (3673:34386ba8cb41) |
---|---|
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 63 unchanged lines hidden (view full) --- 72void 73AtomicSimpleCPU::init() 74{ 75 BaseCPU::init(); 76#if FULL_SYSTEM 77 for (int i = 0; i < threadContexts.size(); ++i) { 78 ThreadContext *tc = threadContexts[i]; 79 | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 63 unchanged lines hidden (view full) --- 72void 73AtomicSimpleCPU::init() 74{ 75 BaseCPU::init(); 76#if FULL_SYSTEM 77 for (int i = 0; i < threadContexts.size(); ++i) { 78 ThreadContext *tc = threadContexts[i]; 79 |
80 // initialize the mem pointers 81 tc->init(); 82 |
|
80 // initialize CPU, including PC 81 TheISA::initCPU(tc, tc->readCpuId()); 82 } 83#endif 84} 85 86bool 87AtomicSimpleCPU::CpuPort::recvTiming(PacketPtr pkt) --- 518 unchanged lines hidden --- | 83 // initialize CPU, including PC 84 TheISA::initCPU(tc, tc->readCpuId()); 85 } 86#endif 87} 88 89bool 90AtomicSimpleCPU::CpuPort::recvTiming(PacketPtr pkt) --- 518 unchanged lines hidden --- |