atomic.cc (3512:cefe7f965104) | atomic.cc (3617:384e3b1eae06) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 199 unchanged lines hidden (view full) --- 208 for (int i = 0; i < threadContexts.size(); ++i) { 209 ThreadContext *tc = threadContexts[i]; 210 if (tc->status() == ThreadContext::Active && _status != Running) { 211 _status = Running; 212 tickEvent.schedule(nextCycle()); 213 break; 214 } 215 } | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 199 unchanged lines hidden (view full) --- 208 for (int i = 0; i < threadContexts.size(); ++i) { 209 ThreadContext *tc = threadContexts[i]; 210 if (tc->status() == ThreadContext::Active && _status != Running) { 211 _status = Running; 212 tickEvent.schedule(nextCycle()); 213 break; 214 } 215 } |
216 if (_status != Running) { 217 _status = Idle; 218 } | |
219} 220 221 222void 223AtomicSimpleCPU::activateContext(int thread_num, int delay) 224{ 225 assert(thread_num == 0); 226 assert(thread); --- 271 unchanged lines hidden (view full) --- 498 Param<Tick> progress_interval; 499 SimObjectParam<System *> system; 500 Param<int> cpu_id; 501 502#if FULL_SYSTEM 503 SimObjectParam<TheISA::ITB *> itb; 504 SimObjectParam<TheISA::DTB *> dtb; 505 Param<Tick> profile; | 216} 217 218 219void 220AtomicSimpleCPU::activateContext(int thread_num, int delay) 221{ 222 assert(thread_num == 0); 223 assert(thread); --- 271 unchanged lines hidden (view full) --- 495 Param<Tick> progress_interval; 496 SimObjectParam<System *> system; 497 Param<int> cpu_id; 498 499#if FULL_SYSTEM 500 SimObjectParam<TheISA::ITB *> itb; 501 SimObjectParam<TheISA::DTB *> dtb; 502 Param<Tick> profile; |
503 504 Param<bool> do_quiesce; 505 Param<bool> do_checkpoint_insts; 506 Param<bool> do_statistics_insts; |
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506#else 507 SimObjectParam<Process *> workload; 508#endif // FULL_SYSTEM 509 510 Param<int> clock; 511 512 Param<bool> defer_registration; 513 Param<int> width; --- 16 unchanged lines hidden (view full) --- 530 INIT_PARAM(progress_interval, "Progress interval"), 531 INIT_PARAM(system, "system object"), 532 INIT_PARAM(cpu_id, "processor ID"), 533 534#if FULL_SYSTEM 535 INIT_PARAM(itb, "Instruction TLB"), 536 INIT_PARAM(dtb, "Data TLB"), 537 INIT_PARAM(profile, ""), | 507#else 508 SimObjectParam<Process *> workload; 509#endif // FULL_SYSTEM 510 511 Param<int> clock; 512 513 Param<bool> defer_registration; 514 Param<int> width; --- 16 unchanged lines hidden (view full) --- 531 INIT_PARAM(progress_interval, "Progress interval"), 532 INIT_PARAM(system, "system object"), 533 INIT_PARAM(cpu_id, "processor ID"), 534 535#if FULL_SYSTEM 536 INIT_PARAM(itb, "Instruction TLB"), 537 INIT_PARAM(dtb, "Data TLB"), 538 INIT_PARAM(profile, ""), |
539 INIT_PARAM(do_quiesce, ""), 540 INIT_PARAM(do_checkpoint_insts, ""), 541 INIT_PARAM(do_statistics_insts, ""), |
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538#else 539 INIT_PARAM(workload, "processes to run"), 540#endif // FULL_SYSTEM 541 542 INIT_PARAM(clock, "clock speed"), 543 INIT_PARAM(defer_registration, "defer system registration (for sampling)"), 544 INIT_PARAM(width, "cpu width"), 545 INIT_PARAM(function_trace, "Enable function trace"), --- 21 unchanged lines hidden (view full) --- 567 params->simulate_stalls = simulate_stalls; 568 params->system = system; 569 params->cpu_id = cpu_id; 570 571#if FULL_SYSTEM 572 params->itb = itb; 573 params->dtb = dtb; 574 params->profile = profile; | 542#else 543 INIT_PARAM(workload, "processes to run"), 544#endif // FULL_SYSTEM 545 546 INIT_PARAM(clock, "clock speed"), 547 INIT_PARAM(defer_registration, "defer system registration (for sampling)"), 548 INIT_PARAM(width, "cpu width"), 549 INIT_PARAM(function_trace, "Enable function trace"), --- 21 unchanged lines hidden (view full) --- 571 params->simulate_stalls = simulate_stalls; 572 params->system = system; 573 params->cpu_id = cpu_id; 574 575#if FULL_SYSTEM 576 params->itb = itb; 577 params->dtb = dtb; 578 params->profile = profile; |
579 params->do_quiesce = do_quiesce; 580 params->do_checkpoint_insts = do_checkpoint_insts; 581 params->do_statistics_insts = do_statistics_insts; |
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575#else 576 params->process = workload; 577#endif 578 579 AtomicSimpleCPU *cpu = new AtomicSimpleCPU(params); 580 return cpu; 581} 582 583REGISTER_SIM_OBJECT("AtomicSimpleCPU", AtomicSimpleCPU) 584 | 582#else 583 params->process = workload; 584#endif 585 586 AtomicSimpleCPU *cpu = new AtomicSimpleCPU(params); 587 return cpu; 588} 589 590REGISTER_SIM_OBJECT("AtomicSimpleCPU", AtomicSimpleCPU) 591 |