atomic.cc (3479:4fbcaa81d105) | atomic.cc (3495:884bf1f0c0c9) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 166 unchanged lines hidden (view full) --- 175AtomicSimpleCPU::resume() 176{ 177 if (_status != SwitchedOut && _status != Idle) { 178 assert(system->getMemoryMode() == System::Atomic); 179 180 changeState(SimObject::Running); 181 if (thread->status() == ThreadContext::Active) { 182 if (!tickEvent.scheduled()) { | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 166 unchanged lines hidden (view full) --- 175AtomicSimpleCPU::resume() 176{ 177 if (_status != SwitchedOut && _status != Idle) { 178 assert(system->getMemoryMode() == System::Atomic); 179 180 changeState(SimObject::Running); 181 if (thread->status() == ThreadContext::Active) { 182 if (!tickEvent.scheduled()) { |
183 Tick nextTick = curTick + cycles(1) - 1; 184 nextTick -= (nextTick % (cycles(1))); 185 tickEvent.schedule(nextTick); | 183 tickEvent.schedule(nextCycle()); |
186 } 187 } 188 } 189} 190 191void 192AtomicSimpleCPU::switchOut() 193{ --- 12 unchanged lines hidden (view full) --- 206 assert(!tickEvent.scheduled()); 207 208 // if any of this CPU's ThreadContexts are active, mark the CPU as 209 // running and schedule its tick event. 210 for (int i = 0; i < threadContexts.size(); ++i) { 211 ThreadContext *tc = threadContexts[i]; 212 if (tc->status() == ThreadContext::Active && _status != Running) { 213 _status = Running; | 184 } 185 } 186 } 187} 188 189void 190AtomicSimpleCPU::switchOut() 191{ --- 12 unchanged lines hidden (view full) --- 204 assert(!tickEvent.scheduled()); 205 206 // if any of this CPU's ThreadContexts are active, mark the CPU as 207 // running and schedule its tick event. 208 for (int i = 0; i < threadContexts.size(); ++i) { 209 ThreadContext *tc = threadContexts[i]; 210 if (tc->status() == ThreadContext::Active && _status != Running) { 211 _status = Running; |
214 Tick nextTick = curTick + cycles(1) - 1; 215 nextTick -= (nextTick % (cycles(1))); 216 tickEvent.schedule(nextTick); | 212 tickEvent.schedule(nextCycle()); |
217 break; 218 } 219 } 220} 221 222 223void 224AtomicSimpleCPU::activateContext(int thread_num, int delay) 225{ 226 assert(thread_num == 0); 227 assert(thread); 228 229 assert(_status == Idle); 230 assert(!tickEvent.scheduled()); 231 232 notIdleFraction++; 233 //Make sure ticks are still on multiples of cycles | 213 break; 214 } 215 } 216} 217 218 219void 220AtomicSimpleCPU::activateContext(int thread_num, int delay) 221{ 222 assert(thread_num == 0); 223 assert(thread); 224 225 assert(_status == Idle); 226 assert(!tickEvent.scheduled()); 227 228 notIdleFraction++; 229 //Make sure ticks are still on multiples of cycles |
234 Tick nextTick = curTick + cycles(delay + 1) - 1; 235 nextTick -= (nextTick % (cycles(1))); 236 tickEvent.schedule(nextTick); | 230 tickEvent.schedule(nextCycle(curTick + cycles(delay))); |
237 _status = Running; 238} 239 240 241void 242AtomicSimpleCPU::suspendContext(int thread_num) 243{ 244 assert(thread_num == 0); --- 343 unchanged lines hidden --- | 231 _status = Running; 232} 233 234 235void 236AtomicSimpleCPU::suspendContext(int thread_num) 237{ 238 assert(thread_num == 0); --- 343 unchanged lines hidden --- |