atomic.cc (3430:5afdd6d7df69) atomic.cc (3431:2e6b4536e574)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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183void
184AtomicSimpleCPU::resume()
185{
186 if (_status != SwitchedOut && _status != Idle) {
187 assert(system->getMemoryMode() == System::Atomic);
188
189 changeState(SimObject::Running);
190 if (thread->status() == ThreadContext::Active) {
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 174 unchanged lines hidden (view full) ---

183void
184AtomicSimpleCPU::resume()
185{
186 if (_status != SwitchedOut && _status != Idle) {
187 assert(system->getMemoryMode() == System::Atomic);
188
189 changeState(SimObject::Running);
190 if (thread->status() == ThreadContext::Active) {
191 if (!tickEvent.scheduled())
192 tickEvent.schedule(curTick);
191 if (!tickEvent.scheduled()) {
192 Tick nextTick = curTick + cycles(1) - 1;
193 nextTick -= (nextTick % (cycles(1)));
194 tickEvent.schedule(nextTick);
195 }
193 }
194 }
195}
196
197void
198AtomicSimpleCPU::switchOut()
199{
200 assert(status() == Running || status() == Idle);

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212 assert(!tickEvent.scheduled());
213
214 // if any of this CPU's ThreadContexts are active, mark the CPU as
215 // running and schedule its tick event.
216 for (int i = 0; i < threadContexts.size(); ++i) {
217 ThreadContext *tc = threadContexts[i];
218 if (tc->status() == ThreadContext::Active && _status != Running) {
219 _status = Running;
196 }
197 }
198}
199
200void
201AtomicSimpleCPU::switchOut()
202{
203 assert(status() == Running || status() == Idle);

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215 assert(!tickEvent.scheduled());
216
217 // if any of this CPU's ThreadContexts are active, mark the CPU as
218 // running and schedule its tick event.
219 for (int i = 0; i < threadContexts.size(); ++i) {
220 ThreadContext *tc = threadContexts[i];
221 if (tc->status() == ThreadContext::Active && _status != Running) {
222 _status = Running;
220 tickEvent.schedule(curTick);
223 Tick nextTick = curTick + cycles(1) - 1;
224 nextTick -= (nextTick % (cycles(1)));
225 tickEvent.schedule(nextTick);
221 break;
222 }
223 }
224}
225
226
227void
228AtomicSimpleCPU::activateContext(int thread_num, int delay)
229{
230 assert(thread_num == 0);
231 assert(thread);
232
233 assert(_status == Idle);
234 assert(!tickEvent.scheduled());
235
236 notIdleFraction++;
237 //Make sure ticks are still on multiples of cycles
238 Tick nextTick = curTick + cycles(1) - 1;
239 nextTick -= (nextTick % (cycles(1)));
226 break;
227 }
228 }
229}
230
231
232void
233AtomicSimpleCPU::activateContext(int thread_num, int delay)
234{
235 assert(thread_num == 0);
236 assert(thread);
237
238 assert(_status == Idle);
239 assert(!tickEvent.scheduled());
240
241 notIdleFraction++;
242 //Make sure ticks are still on multiples of cycles
243 Tick nextTick = curTick + cycles(1) - 1;
244 nextTick -= (nextTick % (cycles(1)));
240 tickEvent.schedule(curTick + cycles(delay));
245 tickEvent.schedule(nextTick);
241 _status = Running;
242}
243
244
245void
246AtomicSimpleCPU::suspendContext(int thread_num)
247{
248 assert(thread_num == 0);

--- 346 unchanged lines hidden --- 		246 _status = Running;
247}
248
249
250void
251AtomicSimpleCPU::suspendContext(int thread_num)
252{
253 assert(thread_num == 0);

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