atomic.cc (3349:fec4a86fa212) atomic.cc (3387:8f146ac8248f)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 434 unchanged lines hidden (view full) ---

443void
444AtomicSimpleCPU::tick()
445{
446 Tick latency = cycles(1); // instruction takes one cycle by default
447
448 for (int i = 0; i < width; ++i) {
449 numCycles++;
450
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 434 unchanged lines hidden (view full) ---

443void
444AtomicSimpleCPU::tick()
445{
446 Tick latency = cycles(1); // instruction takes one cycle by default
447
448 for (int i = 0; i < width; ++i) {
449 numCycles++;
450
451 checkForInterrupts();
451 if (!curStaticInst || !curStaticInst->isDelayedCommit())
452 checkForInterrupts();
452
453 Fault fault = setupFetchRequest(ifetch_req);
454
455 if (fault == NoFault) {
456 ifetch_pkt->reinitFromRequest();
457
458 Tick icache_latency = icachePort.sendAtomic(ifetch_pkt);
459 // ifetch_req is initialized to read the instruction directly

--- 128 unchanged lines hidden --- 		453
454 Fault fault = setupFetchRequest(ifetch_req);
455
456 if (fault == NoFault) {
457 ifetch_pkt->reinitFromRequest();
458
459 Tick icache_latency = icachePort.sendAtomic(ifetch_pkt);
460 // ifetch_req is initialized to read the instruction directly

--- 128 unchanged lines hidden ---