atomic.cc (3177:3a2bc3fbae6e) atomic.cc (3184:8edaf4539e05)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 80 unchanged lines hidden (view full) ---

89 TheISA::initCPU(tc, tc->readCpuId());
90 }
91#endif
92}
93
94bool
95AtomicSimpleCPU::CpuPort::recvTiming(Packet *pkt)
96{
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 80 unchanged lines hidden (view full) ---

89 TheISA::initCPU(tc, tc->readCpuId());
90 }
91#endif
92}
93
94bool
95AtomicSimpleCPU::CpuPort::recvTiming(Packet *pkt)
96{
97 panic("AtomicSimpleCPU doesn't expect recvAtomic callback!");
97 panic("AtomicSimpleCPU doesn't expect recvTiming callback!");
98 return true;
99}
100
101Tick
102AtomicSimpleCPU::CpuPort::recvAtomic(Packet *pkt)
103{
104 panic("AtomicSimpleCPU doesn't expect recvAtomic callback!");
105 return curTick;
106}
107
108void
109AtomicSimpleCPU::CpuPort::recvFunctional(Packet *pkt)
110{
98 return true;
99}
100
101Tick
102AtomicSimpleCPU::CpuPort::recvAtomic(Packet *pkt)
103{
104 panic("AtomicSimpleCPU doesn't expect recvAtomic callback!");
105 return curTick;
106}
107
108void
109AtomicSimpleCPU::CpuPort::recvFunctional(Packet *pkt)
110{
111 panic("AtomicSimpleCPU doesn't expect recvFunctional callback!");
111 //No internal storage to update, just return
112 return;
112}
113
114void
115AtomicSimpleCPU::CpuPort::recvStatusChange(Status status)
116{
117 if (status == RangeChange)
118 return;
119

--- 36 unchanged lines hidden (view full) ---

156{
157}
158
159void
160AtomicSimpleCPU::serialize(ostream &os)
161{
162 SimObject::State so_state = SimObject::getState();
163 SERIALIZE_ENUM(so_state);
113}
114
115void
116AtomicSimpleCPU::CpuPort::recvStatusChange(Status status)
117{
118 if (status == RangeChange)
119 return;
120

--- 36 unchanged lines hidden (view full) ---

157{
158}
159
160void
161AtomicSimpleCPU::serialize(ostream &os)
162{
163 SimObject::State so_state = SimObject::getState();
164 SERIALIZE_ENUM(so_state);
164 Status _status = status();
165 SERIALIZE_ENUM(_status);
166 BaseSimpleCPU::serialize(os);
167 nameOut(os, csprintf("%s.tickEvent", name()));
168 tickEvent.serialize(os);
169}
170
171void
172AtomicSimpleCPU::unserialize(Checkpoint *cp, const string &section)
173{
174 SimObject::State so_state;
175 UNSERIALIZE_ENUM(so_state);
165 BaseSimpleCPU::serialize(os);
166 nameOut(os, csprintf("%s.tickEvent", name()));
167 tickEvent.serialize(os);
168}
169
170void
171AtomicSimpleCPU::unserialize(Checkpoint *cp, const string &section)
172{
173 SimObject::State so_state;
174 UNSERIALIZE_ENUM(so_state);
176 UNSERIALIZE_ENUM(_status);
177 BaseSimpleCPU::unserialize(cp, section);
178 tickEvent.unserialize(cp, csprintf("%s.tickEvent", section));
179}
180
181void
182AtomicSimpleCPU::resume()
183{
184 assert(system->getMemoryMode() == System::Atomic);

--- 401 unchanged lines hidden --- 		175 BaseSimpleCPU::unserialize(cp, section);
176 tickEvent.unserialize(cp, csprintf("%s.tickEvent", section));
177}
178
179void
180AtomicSimpleCPU::resume()
181{
182 assert(system->getMemoryMode() == System::Atomic);

--- 401 unchanged lines hidden ---