atomic.cc (2856:89691405ec9c) | atomic.cc (2901:f9a45473ab55) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 19 unchanged lines hidden (view full) --- 28 * Authors: Steve Reinhardt 29 */ 30 31#include "arch/utility.hh" 32#include "cpu/exetrace.hh" 33#include "cpu/simple/atomic.hh" 34#include "mem/packet_impl.hh" 35#include "sim/builder.hh" | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 19 unchanged lines hidden (view full) --- 28 * Authors: Steve Reinhardt 29 */ 30 31#include "arch/utility.hh" 32#include "cpu/exetrace.hh" 33#include "cpu/simple/atomic.hh" 34#include "mem/packet_impl.hh" 35#include "sim/builder.hh" |
36#include "sim/system.hh" |
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36 37using namespace std; 38using namespace TheISA; 39 40AtomicSimpleCPU::TickEvent::TickEvent(AtomicSimpleCPU *c) 41 : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c) 42{ 43} --- 124 unchanged lines hidden (view full) --- 168AtomicSimpleCPU::unserialize(Checkpoint *cp, const string §ion) 169{ 170 UNSERIALIZE_ENUM(_status); 171 BaseSimpleCPU::unserialize(cp, section); 172 tickEvent.unserialize(cp, csprintf("%s.tickEvent", section)); 173} 174 175void | 37 38using namespace std; 39using namespace TheISA; 40 41AtomicSimpleCPU::TickEvent::TickEvent(AtomicSimpleCPU *c) 42 : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c) 43{ 44} --- 124 unchanged lines hidden (view full) --- 169AtomicSimpleCPU::unserialize(Checkpoint *cp, const string §ion) 170{ 171 UNSERIALIZE_ENUM(_status); 172 BaseSimpleCPU::unserialize(cp, section); 173 tickEvent.unserialize(cp, csprintf("%s.tickEvent", section)); 174} 175 176void |
177AtomicSimpleCPU::resume() 178{ 179 assert(system->getMemoryMode() == System::Atomic); 180 changeState(SimObject::Running); 181} 182 183void |
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176AtomicSimpleCPU::switchOut() 177{ 178 assert(status() == Running || status() == Idle); 179 _status = SwitchedOut; 180 181 tickEvent.squash(); 182} 183 --- 262 unchanged lines hidden (view full) --- 446// 447BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU) 448 449 Param<Counter> max_insts_any_thread; 450 Param<Counter> max_insts_all_threads; 451 Param<Counter> max_loads_any_thread; 452 Param<Counter> max_loads_all_threads; 453 SimObjectParam<MemObject *> mem; | 184AtomicSimpleCPU::switchOut() 185{ 186 assert(status() == Running || status() == Idle); 187 _status = SwitchedOut; 188 189 tickEvent.squash(); 190} 191 --- 262 unchanged lines hidden (view full) --- 454// 455BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU) 456 457 Param<Counter> max_insts_any_thread; 458 Param<Counter> max_insts_all_threads; 459 Param<Counter> max_loads_any_thread; 460 Param<Counter> max_loads_all_threads; 461 SimObjectParam<MemObject *> mem; |
462 SimObjectParam<System *> system; |
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454 455#if FULL_SYSTEM 456 SimObjectParam<AlphaITB *> itb; 457 SimObjectParam<AlphaDTB *> dtb; | 463 464#if FULL_SYSTEM 465 SimObjectParam<AlphaITB *> itb; 466 SimObjectParam<AlphaDTB *> dtb; |
458 SimObjectParam<System *> system; | |
459 Param<int> cpu_id; 460 Param<Tick> profile; 461#else 462 SimObjectParam<Process *> workload; 463#endif // FULL_SYSTEM 464 465 Param<int> clock; 466 --- 11 unchanged lines hidden (view full) --- 478 "terminate when any thread reaches this inst count"), 479 INIT_PARAM(max_insts_all_threads, 480 "terminate when all threads have reached this inst count"), 481 INIT_PARAM(max_loads_any_thread, 482 "terminate when any thread reaches this load count"), 483 INIT_PARAM(max_loads_all_threads, 484 "terminate when all threads have reached this load count"), 485 INIT_PARAM(mem, "memory"), | 467 Param<int> cpu_id; 468 Param<Tick> profile; 469#else 470 SimObjectParam<Process *> workload; 471#endif // FULL_SYSTEM 472 473 Param<int> clock; 474 --- 11 unchanged lines hidden (view full) --- 486 "terminate when any thread reaches this inst count"), 487 INIT_PARAM(max_insts_all_threads, 488 "terminate when all threads have reached this inst count"), 489 INIT_PARAM(max_loads_any_thread, 490 "terminate when any thread reaches this load count"), 491 INIT_PARAM(max_loads_all_threads, 492 "terminate when all threads have reached this load count"), 493 INIT_PARAM(mem, "memory"), |
494 INIT_PARAM(system, "system object"), |
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486 487#if FULL_SYSTEM 488 INIT_PARAM(itb, "Instruction TLB"), 489 INIT_PARAM(dtb, "Data TLB"), | 495 496#if FULL_SYSTEM 497 INIT_PARAM(itb, "Instruction TLB"), 498 INIT_PARAM(dtb, "Data TLB"), |
490 INIT_PARAM(system, "system object"), | |
491 INIT_PARAM(cpu_id, "processor ID"), 492 INIT_PARAM(profile, ""), 493#else 494 INIT_PARAM(workload, "processes to run"), 495#endif // FULL_SYSTEM 496 497 INIT_PARAM(clock, "clock speed"), 498 INIT_PARAM(defer_registration, "defer system registration (for sampling)"), --- 16 unchanged lines hidden (view full) --- 515 params->max_loads_all_threads = max_loads_all_threads; 516 params->deferRegistration = defer_registration; 517 params->clock = clock; 518 params->functionTrace = function_trace; 519 params->functionTraceStart = function_trace_start; 520 params->width = width; 521 params->simulate_stalls = simulate_stalls; 522 params->mem = mem; | 499 INIT_PARAM(cpu_id, "processor ID"), 500 INIT_PARAM(profile, ""), 501#else 502 INIT_PARAM(workload, "processes to run"), 503#endif // FULL_SYSTEM 504 505 INIT_PARAM(clock, "clock speed"), 506 INIT_PARAM(defer_registration, "defer system registration (for sampling)"), --- 16 unchanged lines hidden (view full) --- 523 params->max_loads_all_threads = max_loads_all_threads; 524 params->deferRegistration = defer_registration; 525 params->clock = clock; 526 params->functionTrace = function_trace; 527 params->functionTraceStart = function_trace_start; 528 params->width = width; 529 params->simulate_stalls = simulate_stalls; 530 params->mem = mem; |
531 params->system = system; |
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523 524#if FULL_SYSTEM 525 params->itb = itb; 526 params->dtb = dtb; | 532 533#if FULL_SYSTEM 534 params->itb = itb; 535 params->dtb = dtb; |
527 params->system = system; | |
528 params->cpu_id = cpu_id; 529 params->profile = profile; 530#else 531 params->process = workload; 532#endif 533 534 AtomicSimpleCPU *cpu = new AtomicSimpleCPU(params); 535 return cpu; 536} 537 538REGISTER_SIM_OBJECT("AtomicSimpleCPU", AtomicSimpleCPU) 539 | 536 params->cpu_id = cpu_id; 537 params->profile = profile; 538#else 539 params->process = workload; 540#endif 541 542 AtomicSimpleCPU *cpu = new AtomicSimpleCPU(params); 543 return cpu; 544} 545 546REGISTER_SIM_OBJECT("AtomicSimpleCPU", AtomicSimpleCPU) 547 |