atomic.cc (11321:02e930db812d) atomic.cc (11356:a80884911971)
1/*
2 * Copyright 2014 Google, Inc.
3 * Copyright (c) 2012-2013,2015 ARM Limited
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 278 unchanged lines hidden (view full) ---

287
288 for (ThreadID tid = 0; tid < cpu->numThreads; tid++) {
289 if (cpu->getCpuAddrMonitor(tid)->doMonitor(pkt)) {
290 cpu->wakeup(tid);
291 }
292 }
293
294 // if snoop invalidates, release any associated locks
1/*
2 * Copyright 2014 Google, Inc.
3 * Copyright (c) 2012-2013,2015 ARM Limited
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 278 unchanged lines hidden (view full) ---

287
288 for (ThreadID tid = 0; tid < cpu->numThreads; tid++) {
289 if (cpu->getCpuAddrMonitor(tid)->doMonitor(pkt)) {
290 cpu->wakeup(tid);
291 }
292 }
293
294 // if snoop invalidates, release any associated locks
295 if (pkt->isInvalidate()) {
295 // When run without caches, Invalidation packets will not be received
296 // hence we must check if the incoming packets are writes and wakeup
297 // the processor accordingly
298 if (pkt->isInvalidate() || pkt->isWrite()) {
296 DPRINTF(SimpleCPU, "received invalidation for addr:%#x\n",
297 pkt->getAddr());
298 for (auto &t_info : cpu->threadInfo) {
299 TheISA::handleLockedSnoop(t_info->thread, pkt, cacheBlockMask);
300 }
301 }
302
303 return 0;

--- 395 unchanged lines hidden --- 		299 DPRINTF(SimpleCPU, "received invalidation for addr:%#x\n",
300 pkt->getAddr());
301 for (auto &t_info : cpu->threadInfo) {
302 TheISA::handleLockedSnoop(t_info->thread, pkt, cacheBlockMask);
303 }
304 }
305
306 return 0;

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