atomic.cc (10651:333350e4e334) atomic.cc (10665:aef704eaedd2)
1/*
2 * Copyright 2014 Google, Inc.
3 * Copyright (c) 2012-2013 ARM Limited
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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312
313Fault
314AtomicSimpleCPU::readMem(Addr addr, uint8_t * data,
315 unsigned size, unsigned flags)
316{
317 // use the CPU's statically allocated read request and packet objects
318 Request *req = &data_read_req;
319
1/*
2 * Copyright 2014 Google, Inc.
3 * Copyright (c) 2012-2013 ARM Limited
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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312
313Fault
314AtomicSimpleCPU::readMem(Addr addr, uint8_t * data,
315 unsigned size, unsigned flags)
316{
317 // use the CPU's statically allocated read request and packet objects
318 Request *req = &data_read_req;
319
320 if (traceData) {
321 traceData->setAddr(addr);
322 }
320 if (traceData)
321 traceData->setMem(addr, size, flags);
323
324 //The size of the data we're trying to read.
325 int fullSize = size;
326
327 //The address of the second part of this access if it needs to be split
328 //across a cache line boundary.
329 Addr secondAddr = roundDown(addr + size - 1, cacheLineSize());
330

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408 assert(flags & Request::CACHE_BLOCK_ZERO);
409 // This must be a cache block cleaning request
410 data = zero_array;
411 }
412
413 // use the CPU's statically allocated write request and packet objects
414 Request *req = &data_write_req;
415
322
323 //The size of the data we're trying to read.
324 int fullSize = size;
325
326 //The address of the second part of this access if it needs to be split
327 //across a cache line boundary.
328 Addr secondAddr = roundDown(addr + size - 1, cacheLineSize());
329

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407 assert(flags & Request::CACHE_BLOCK_ZERO);
408 // This must be a cache block cleaning request
409 data = zero_array;
410 }
411
412 // use the CPU's statically allocated write request and packet objects
413 Request *req = &data_write_req;
414
416 if (traceData) {
417 traceData->setAddr(addr);
418 }
415 if (traceData)
416 traceData->setMem(addr, size, flags);
419
420 //The size of the data we're trying to read.
421 int fullSize = size;
422
423 //The address of the second part of this access if it needs to be split
424 //across a cache line boundary.
425 Addr secondAddr = roundDown(addr + size - 1, cacheLineSize());
426

--- 229 unchanged lines hidden --- 		417
418 //The size of the data we're trying to read.
419 int fullSize = size;
420
421 //The address of the second part of this access if it needs to be split
422 //across a cache line boundary.
423 Addr secondAddr = roundDown(addr + size - 1, cacheLineSize());
424

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