atomic.cc (10031:79d034cd6ba3) | atomic.cc (10342:711eb0e64249) |
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1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 326 unchanged lines hidden (view full) --- 335 while (1) { 336 req->setVirt(0, addr, size, flags, dataMasterId(), thread->pcState().instAddr()); 337 338 // translate to physical address 339 Fault fault = thread->dtb->translateAtomic(req, tc, BaseTLB::Read); 340 341 // Now do the access. 342 if (fault == NoFault && !req->getFlags().isSet(Request::NO_ACCESS)) { | 1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 326 unchanged lines hidden (view full) --- 335 while (1) { 336 req->setVirt(0, addr, size, flags, dataMasterId(), thread->pcState().instAddr()); 337 338 // translate to physical address 339 Fault fault = thread->dtb->translateAtomic(req, tc, BaseTLB::Read); 340 341 // Now do the access. 342 if (fault == NoFault && !req->getFlags().isSet(Request::NO_ACCESS)) { |
343 Packet pkt = Packet(req, 344 req->isLLSC() ? MemCmd::LoadLockedReq : 345 MemCmd::ReadReq); | 343 Packet pkt(req, MemCmd::ReadReq); 344 pkt.refineCommand(); |
346 pkt.dataStatic(data); 347 348 if (req->isMmappedIpr()) 349 dcache_latency += TheISA::handleIprRead(thread->getTC(), &pkt); 350 else { 351 if (fastmem && system->isMemAddr(pkt.getAddr())) 352 system->getPhysMem().access(&pkt); 353 else --- 357 unchanged lines hidden --- | 345 pkt.dataStatic(data); 346 347 if (req->isMmappedIpr()) 348 dcache_latency += TheISA::handleIprRead(thread->getTC(), &pkt); 349 else { 350 if (fastmem && system->isMemAddr(pkt.getAddr())) 351 system->getPhysMem().access(&pkt); 352 else --- 357 unchanged lines hidden --- |