1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 352 unchanged lines hidden (view full) --- 361 dataPtr += dataSize; 362 //Adjust the size to get the remaining bytes. 363 dataSize = addr + sizeof(T) - secondAddr; 364 //And access the right address. 365 addr = secondAddr; 366 } 367} 368 |
369Fault 370AtomicSimpleCPU::translateDataReadAddr(Addr vaddr, Addr & paddr, 371 int size, unsigned flags) 372{ 373 // use the CPU's statically allocated read request and packet objects 374 Request *req = &data_read_req; 375 376 if (traceData) { 377 traceData->setAddr(vaddr); 378 } 379 380 //The block size of our peer. 381 int blockSize = dcachePort.peerBlockSize(); 382 //The size of the data we're trying to read. 383 int dataSize = size; 384 385 bool firstTimeThrough = true; 386 387 //The address of the second part of this access if it needs to be split 388 //across a cache line boundary. 389 Addr secondAddr = roundDown(vaddr + dataSize - 1, blockSize); 390 391 if(secondAddr > vaddr) 392 dataSize = secondAddr - vaddr; 393 394 while(1) { 395 req->setVirt(0, vaddr, dataSize, flags, thread->readPC()); 396 397 // translate to physical address 398 Fault fault = thread->translateDataReadReq(req); 399 400 //If there's a fault, return it 401 if (fault != NoFault) 402 return fault; 403 404 if (firstTimeThrough) { 405 paddr = req->getPaddr(); 406 firstTimeThrough = false; 407 } 408 409 //If we don't need to access a second cache line, stop now. 410 if (secondAddr <= vaddr) 411 return fault; 412 413 /* 414 * Set up for accessing the second cache line. 415 */ 416 417 //Adjust the size to get the remaining bytes. 418 dataSize = vaddr + size - secondAddr; 419 //And access the right address. 420 vaddr = secondAddr; 421 } 422} 423 |
424#ifndef DOXYGEN_SHOULD_SKIP_THIS 425 426template 427Fault 428AtomicSimpleCPU::read(Addr addr, Twin32_t &data, unsigned flags); 429 430template 431Fault --- 142 unchanged lines hidden (view full) --- 574 dataPtr += dataSize; 575 //Adjust the size to get the remaining bytes. 576 dataSize = addr + sizeof(T) - secondAddr; 577 //And access the right address. 578 addr = secondAddr; 579 } 580} 581 |
582Fault 583AtomicSimpleCPU::translateDataWriteAddr(Addr vaddr, Addr &paddr, 584 int size, unsigned flags) 585{ 586 // use the CPU's statically allocated write request and packet objects 587 Request *req = &data_write_req; |
588 |
589 if (traceData) { 590 traceData->setAddr(vaddr); 591 } 592 593 //The block size of our peer. 594 int blockSize = dcachePort.peerBlockSize(); 595 596 //The address of the second part of this access if it needs to be split 597 //across a cache line boundary. 598 Addr secondAddr = roundDown(vaddr + size - 1, blockSize); 599 600 //The size of the data we're trying to read. 601 int dataSize = size; 602 603 bool firstTimeThrough = true; 604 605 if(secondAddr > vaddr) 606 dataSize = secondAddr - vaddr; 607 608 dcache_latency = 0; 609 610 while(1) { 611 req->setVirt(0, vaddr, flags, flags, thread->readPC()); 612 613 // translate to physical address 614 Fault fault = thread->translateDataWriteReq(req); 615 616 //If there's a fault or we don't need to access a second cache line, 617 //stop now. 618 if (fault != NoFault) 619 return fault; 620 621 if (firstTimeThrough) { 622 paddr = req->getPaddr(); 623 firstTimeThrough = false; 624 } 625 626 if (secondAddr <= vaddr) 627 return fault; 628 629 /* 630 * Set up for accessing the second cache line. 631 */ 632 633 //Adjust the size to get the remaining bytes. 634 dataSize = vaddr + size - secondAddr; 635 //And access the right address. 636 vaddr = secondAddr; 637 } 638} 639 640 |
641#ifndef DOXYGEN_SHOULD_SKIP_THIS 642 643template 644Fault 645AtomicSimpleCPU::write(Twin32_t data, Addr addr, 646 unsigned flags, uint64_t *res); 647 648template --- 174 unchanged lines hidden --- |