1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 483 unchanged lines hidden (view full) --- 492 dcache_access = false; // assume no dcache access 493 preExecute(); 494 495 fault = curStaticInst->execute(this, traceData); 496 postExecute(); 497 498 // @todo remove me after debugging with legion done 499 if (curStaticInst && (!curStaticInst->isMicroOp() || |
500 curStaticInst->isFirstMicroOp())) |
501 instCnt++; 502 503 if (simulate_stalls) { 504 Tick icache_stall = icache_latency - cycles(1); 505 Tick dcache_stall = 506 dcache_access ? dcache_latency - cycles(1) : 0; 507 Tick stall_cycles = (icache_stall + dcache_stall) / cycles(1); 508 if (cycles(stall_cycles) < (icache_stall + dcache_stall)) --- 125 unchanged lines hidden --- |