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> #include "arch/locked_mem.hh"
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< // @todo fix me and get the real cpu id & thread number!!!
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< ifetch_req->setThreadContext(0,0); //Need CPU/Thread IDS HERE
---
> ifetch_req->setThreadContext(p->cpu_id, 0); // Add thread ID if we add MT
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< data_read_req->setThreadContext(0,0); //Need CPU/Thread IDS HERE
---
> data_read_req->setThreadContext(p->cpu_id, 0); // Add thread ID here too
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< data_write_req->setThreadContext(0,0); //Need CPU/Thread IDS HERE
---
> data_write_req->setThreadContext(p->cpu_id, 0); // Add thread ID here too
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>
> if (req->isLocked()) {
> TheISA::handleLockedRead(thread, req);
> }
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< data = htog(data);
< pkt->reinitFromRequest();
< pkt->dataStatic(&data);
---
> bool do_access = true; // flag to suppress cache access
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< dcache_latency = dcachePort.sendAtomic(pkt);
< dcache_access = true;
---
> if (req->isLocked()) {
> do_access = TheISA::handleLockedWrite(thread, req);
> }
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< assert(pkt->result == Packet::Success);
---
> if (do_access) {
> data = htog(data);
> pkt->reinitFromRequest();
> pkt->dataStatic(&data);
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< if (res && req->getFlags() & LOCKED) {
< *res = req->getScResult();
---
> dcache_latency = dcachePort.sendAtomic(pkt);
> dcache_access = true;
>
> assert(pkt->result == Packet::Success);
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>
> if (req->isLocked()) {
> uint64_t scResult = req->getScResult();
> if (scResult != 0) {
> // clear failure counter
> thread->setStCondFailures(0);
> }
> if (res) {
> *res = req->getScResult();
> }
> }
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> Param<int> cpu_id;
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< Param<int> cpu_id;
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> INIT_PARAM(cpu_id, "processor ID"),
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< INIT_PARAM(cpu_id, "processor ID"),
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> params->cpu_id = cpu_id;
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< params->cpu_id = cpu_id;