1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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67 return &icachePort;
68 else
69 panic("No Such Port\n");
70}
71
72void
73AtomicSimpleCPU::init()
74{
75 BaseCPU::init();
76#if FULL_SYSTEM
77 for (int i = 0; i < threadContexts.size(); ++i) {
78 ThreadContext *tc = threadContexts[i];
79
80 // initialize CPU, including PC
81 TheISA::initCPU(tc, tc->readCpuId());
82 }

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486//
487BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU)
488
489 Param<Counter> max_insts_any_thread;
490 Param<Counter> max_insts_all_threads;
491 Param<Counter> max_loads_any_thread;
492 Param<Counter> max_loads_all_threads;
493 Param<Tick> progress_interval;
494 SimObjectParam<System *> system;
495 Param<int> cpu_id;
496
497#if FULL_SYSTEM
498 SimObjectParam<AlphaITB *> itb;
499 SimObjectParam<AlphaDTB *> dtb;
500 Param<Tick> profile;
501#else

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518 "terminate when any thread reaches this inst count"),
519 INIT_PARAM(max_insts_all_threads,
520 "terminate when all threads have reached this inst count"),
521 INIT_PARAM(max_loads_any_thread,
522 "terminate when any thread reaches this load count"),
523 INIT_PARAM(max_loads_all_threads,
524 "terminate when all threads have reached this load count"),
525 INIT_PARAM(progress_interval, "Progress interval"),
526 INIT_PARAM(system, "system object"),
527 INIT_PARAM(cpu_id, "processor ID"),
528
529#if FULL_SYSTEM
530 INIT_PARAM(itb, "Instruction TLB"),
531 INIT_PARAM(dtb, "Data TLB"),
532 INIT_PARAM(profile, ""),
533#else

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555 params->max_loads_all_threads = max_loads_all_threads;
556 params->progress_interval = progress_interval;
557 params->deferRegistration = defer_registration;
558 params->clock = clock;
559 params->functionTrace = function_trace;
560 params->functionTraceStart = function_trace_start;
561 params->width = width;
562 params->simulate_stalls = simulate_stalls;
563 params->system = system;
564 params->cpu_id = cpu_id;
565
566#if FULL_SYSTEM
567 params->itb = itb;
568 params->dtb = dtb;
569 params->profile = profile;
570#else
571 params->process = workload;
572#endif
573
574 AtomicSimpleCPU *cpu = new AtomicSimpleCPU(params);
575 return cpu;
576}
577
578REGISTER_SIM_OBJECT("AtomicSimpleCPU", AtomicSimpleCPU)
579