reg_class.hh (13020:b5f05a988593) | reg_class.hh (13610:5d5404ac6288) |
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1/* | 1/* |
2 * Copyright (c) 2016 ARM Limited | 2 * Copyright (c) 2016-2017 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 44 unchanged lines hidden (view full) --- 55/** Enumerate the classes of registers. */ 56enum RegClass { 57 IntRegClass, ///< Integer register 58 FloatRegClass, ///< Floating-point register 59 /** Vector Register. */ 60 VecRegClass, 61 /** Vector Register Native Elem lane. */ 62 VecElemClass, | 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 44 unchanged lines hidden (view full) --- 55/** Enumerate the classes of registers. */ 56enum RegClass { 57 IntRegClass, ///< Integer register 58 FloatRegClass, ///< Floating-point register 59 /** Vector Register. */ 60 VecRegClass, 61 /** Vector Register Native Elem lane. */ 62 VecElemClass, |
63 VecPredRegClass, |
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63 CCRegClass, ///< Condition-code register 64 MiscRegClass ///< Control (misc) register 65}; 66 67/** Number of register classes. 68 * This value is not part of the enum, because putting it there makes the 69 * compiler complain about unhandled cases in some switch statements. 70 */ --- 75 unchanged lines hidden (view full) --- 146 bool isFloatReg() const { return regClass == FloatRegClass; } 147 148 /** @Return true if it is a condition-code physical register. */ 149 bool isVecReg() const { return regClass == VecRegClass; } 150 151 /** @Return true if it is a condition-code physical register. */ 152 bool isVecElem() const { return regClass == VecElemClass; } 153 | 64 CCRegClass, ///< Condition-code register 65 MiscRegClass ///< Control (misc) register 66}; 67 68/** Number of register classes. 69 * This value is not part of the enum, because putting it there makes the 70 * compiler complain about unhandled cases in some switch statements. 71 */ --- 75 unchanged lines hidden (view full) --- 147 bool isFloatReg() const { return regClass == FloatRegClass; } 148 149 /** @Return true if it is a condition-code physical register. */ 150 bool isVecReg() const { return regClass == VecRegClass; } 151 152 /** @Return true if it is a condition-code physical register. */ 153 bool isVecElem() const { return regClass == VecElemClass; } 154 |
155 /** @Return true if it is a predicate physical register. */ 156 bool isVecPredReg() const { return regClass == VecPredRegClass; } 157 |
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154 /** @Return true if it is a condition-code physical register. */ 155 bool isCCReg() const { return regClass == CCRegClass; } 156 157 /** @Return true if it is a condition-code physical register. */ 158 bool isMiscReg() const { return regClass == MiscRegClass; } 159 160 /** 161 * Return true if this register can be renamed --- 12 unchanged lines hidden (view full) --- 174 * Required to be able to use a vector for the register mapping. 175 */ 176 inline RegIndex flatIndex() const 177 { 178 switch (regClass) { 179 case IntRegClass: 180 case FloatRegClass: 181 case VecRegClass: | 158 /** @Return true if it is a condition-code physical register. */ 159 bool isCCReg() const { return regClass == CCRegClass; } 160 161 /** @Return true if it is a condition-code physical register. */ 162 bool isMiscReg() const { return regClass == MiscRegClass; } 163 164 /** 165 * Return true if this register can be renamed --- 12 unchanged lines hidden (view full) --- 178 * Required to be able to use a vector for the register mapping. 179 */ 180 inline RegIndex flatIndex() const 181 { 182 switch (regClass) { 183 case IntRegClass: 184 case FloatRegClass: 185 case VecRegClass: |
186 case VecPredRegClass: |
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182 case CCRegClass: 183 case MiscRegClass: 184 return regIdx; 185 case VecElemClass: 186 return Scale*regIdx + elemIdx; 187 } 188 panic("Trying to flatten a register without class!"); 189 return -1; --- 45 unchanged lines hidden --- | 187 case CCRegClass: 188 case MiscRegClass: 189 return regIdx; 190 case VecElemClass: 191 return Scale*regIdx + elemIdx; 192 } 193 panic("Trying to flatten a register without class!"); 194 return -1; --- 45 unchanged lines hidden --- |