1/*
2 * Copyright (c) 2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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77 */
78class RegId {
79 private:
80 static const char* regClassStrings[];
81 RegClass regClass;
82 RegIndex regIdx;
83 ElemIndex elemIdx;
84 static constexpr size_t Scale = TheISA::NumVecElemPerVecReg;
85 public:
86 RegId() {};
87 RegId(RegClass reg_class, RegIndex reg_idx)
88 : regClass(reg_class), regIdx(reg_idx), elemIdx(-1)
89 {
90 panic_if(regClass == VecElemClass,
91 "Creating vector physical index w/o element index");
92 }

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196 /** Return a const char* with the register class name. */
197 const char* className() const { return regClassStrings[regClass]; }
198
199 friend std::ostream&
200 operator<<(std::ostream& os, const RegId& rid) {
201 return os << rid.className() << "{" << rid.index() << "}";
202 }
203};
204#endif // __CPU__REG_CLASS_HH__