1/*
2 * Copyright (c) 2013 Advanced Micro Devices, Inc.
3 * All rights reserved
4 *.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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37#include "arch/registers.hh"
38#include "config/the_isa.hh"
39
40/// Enumerate the classes of registers.
41enum RegClass {
42 IntRegClass, ///< Integer register
43 FloatRegClass, ///< Floating-point register
44 CCRegClass, ///< Condition-code register
45 VectorRegClass, ///< Vector register
46 MiscRegClass ///< Control (misc) register
47};
48
49/// Number of register classes. This value is not part of the enum,
50/// because putting it there makes the compiler complain about
51/// unhandled cases in some switch statements.
52const int NumRegClasses = MiscRegClass + 1;
53

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72 int offset;
73
74 if (reg_idx < TheISA::FP_Reg_Base) {
75 cl = IntRegClass;
76 offset = 0;
77 } else if (reg_idx < TheISA::CC_Reg_Base) {
78 cl = FloatRegClass;
79 offset = TheISA::FP_Reg_Base;
80 } else if (reg_idx < TheISA::Vector_Reg_Base) {
81 // if there are no CC regs, the ISA should set
82 // CC_Reg_Base == Misc_Reg_Base so the if above
83 // never succeeds
84 cl = CCRegClass;
85 offset = TheISA::CC_Reg_Base;
86 } else if (reg_idx < TheISA::Misc_Reg_Base) {
87 cl = VectorRegClass;
88 offset = TheISA::Vector_Reg_Base;
89 } else {
90 cl = MiscRegClass;
91 offset = TheISA::Misc_Reg_Base;
92 }
93
94 if (rel_reg_idx)
95 *rel_reg_idx = reg_idx - offset;
96 return cl;
97}
98
99/// Map enum values to strings for debugging
100extern const char *RegClassStrings[];
101
102
103#endif // __CPU__REG_CLASS_HH__