ltage.hh (11784:00fd5dce5e7e) ltage.hh (13420:5cb2b90e1cb5)
1/*
2 * Copyright (c) 2014 The University of Wisconsin
3 *
4 * Copyright (c) 2006 INRIA (Institut National de Recherche en
5 * Informatique et en Automatique / French National Research Institute
6 * for Computer Science and Applied Mathematics)
7 *
8 * All rights reserved.

--- 75 unchanged lines hidden (view full) ---

84 uint16_t tag;
85 uint8_t age;
86 bool dir;
87
88 LoopEntry() : numIter(0), currentIter(0), currentIterSpec(0),
89 confidence(0), tag(0), age(0), dir(0) { }
90 };
91
1/*
2 * Copyright (c) 2014 The University of Wisconsin
3 *
4 * Copyright (c) 2006 INRIA (Institut National de Recherche en
5 * Informatique et en Automatique / French National Research Institute
6 * for Computer Science and Applied Mathematics)
7 *
8 * All rights reserved.

--- 75 unchanged lines hidden (view full) ---

84 uint16_t tag;
85 uint8_t age;
86 bool dir;
87
88 LoopEntry() : numIter(0), currentIter(0), currentIterSpec(0),
89 confidence(0), tag(0), age(0), dir(0) { }
90 };
91
92 // Bimodal Predictor Entry
93 struct BimodalEntry
94 {
95 uint8_t pred;
96 uint8_t hyst;
97
98 BimodalEntry() : pred(0), hyst(1) { }
99 };
100
101 // Tage Entry
102 struct TageEntry
103 {
104 int8_t ctr;
105 uint16_t tag;
106 int8_t u;
107 TageEntry() : ctr(0), tag(0), u(0) { }
108 };

--- 241 unchanged lines hidden (view full) ---

350 * @param pc The unshifted branch PC.
351 * @param taken The predicted branch outcome.
352 * @param bi Pointer to information on the prediction
353 * recorded at prediction time.
354 */
355 void specLoopUpdate(Addr pc, bool taken, BranchInfo* bi);
356
357 const unsigned logSizeBiMP;
92 // Tage Entry
93 struct TageEntry
94 {
95 int8_t ctr;
96 uint16_t tag;
97 int8_t u;
98 TageEntry() : ctr(0), tag(0), u(0) { }
99 };

--- 241 unchanged lines hidden (view full) ---

341 * @param pc The unshifted branch PC.
342 * @param taken The predicted branch outcome.
343 * @param bi Pointer to information on the prediction
344 * recorded at prediction time.
345 */
346 void specLoopUpdate(Addr pc, bool taken, BranchInfo* bi);
347
348 const unsigned logSizeBiMP;
349 const unsigned logRatioBiModalHystEntries;
358 const unsigned logSizeTagTables;
359 const unsigned logSizeLoopPred;
360 const unsigned nHistoryTables;
361 const unsigned tagTableCounterBits;
362 const unsigned histBufferSize;
363 const unsigned minHist;
364 const unsigned maxHist;
365 const unsigned minTagWidth;
366
350 const unsigned logSizeTagTables;
351 const unsigned logSizeLoopPred;
352 const unsigned nHistoryTables;
353 const unsigned tagTableCounterBits;
354 const unsigned histBufferSize;
355 const unsigned minHist;
356 const unsigned maxHist;
357 const unsigned minTagWidth;
358
367 BimodalEntry *btable;
359 std::vector<bool> btablePrediction;
360 std::vector<bool> btableHysteresis;
368 TageEntry **gtable;
369 LoopEntry *ltable;
370
371 // Keep per-thread histories to
372 // support SMT.
373 struct ThreadHistory {
374 // Speculative path history
375 // (LSB of branch address)

--- 33 unchanged lines hidden ---
361 TageEntry **gtable;
362 LoopEntry *ltable;
363
364 // Keep per-thread histories to
365 // support SMT.
366 struct ThreadHistory {
367 // Speculative path history
368 // (LSB of branch address)

--- 33 unchanged lines hidden ---