bpred_unit.cc (11433:72b075cdc336) bpred_unit.cc (11434:b5aed9d2d54e)
1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2010 The University of Edinburgh
4 * Copyright (c) 2012 Mark D. Hill and David A. Wood
5 * All rights reserved
6 *
7 * The license below extends only to copyright in the software and shall
8 * not be construed as granting a license to any other intellectual

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190 ppBranches->notify(1);
191
192 void *bp_history = NULL;
193
194 if (inst->isUncondCtrl()) {
195 DPRINTF(Branch, "[tid:%i]: Unconditional control.\n", tid);
196 pred_taken = true;
197 // Tell the BP there was an unconditional branch.
1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2010 The University of Edinburgh
4 * Copyright (c) 2012 Mark D. Hill and David A. Wood
5 * All rights reserved
6 *
7 * The license below extends only to copyright in the software and shall
8 * not be construed as granting a license to any other intellectual

--- 181 unchanged lines hidden (view full) ---

190 ppBranches->notify(1);
191
192 void *bp_history = NULL;
193
194 if (inst->isUncondCtrl()) {
195 DPRINTF(Branch, "[tid:%i]: Unconditional control.\n", tid);
196 pred_taken = true;
197 // Tell the BP there was an unconditional branch.
198 uncondBranch(pc.instAddr(), bp_history);
198 uncondBranch(tid, pc.instAddr(), bp_history);
199 } else {
200 ++condPredicted;
199 } else {
200 ++condPredicted;
201 pred_taken = lookup(pc.instAddr(), bp_history);
201 pred_taken = lookup(tid, pc.instAddr(), bp_history);
202
203 DPRINTF(Branch, "[tid:%i]: [sn:%i] Branch predictor"
204 " predicted %i for PC %s\n", tid, seqNum, pred_taken, pc);
205 }
206
207 DPRINTF(Branch, "[tid:%i]: [sn:%i] Creating prediction history "
208 "for PC %s\n", tid, seqNum, pc);
209

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260 } else {
261 DPRINTF(Branch, "[tid:%i]: BTB doesn't have a "
262 "valid entry.\n",tid);
263 pred_taken = false;
264 // The Direction of the branch predictor is altered
265 // because the BTB did not have an entry
266 // The predictor needs to be updated accordingly
267 if (!inst->isCall() && !inst->isReturn()) {
202
203 DPRINTF(Branch, "[tid:%i]: [sn:%i] Branch predictor"
204 " predicted %i for PC %s\n", tid, seqNum, pred_taken, pc);
205 }
206
207 DPRINTF(Branch, "[tid:%i]: [sn:%i] Creating prediction history "
208 "for PC %s\n", tid, seqNum, pc);
209

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260 } else {
261 DPRINTF(Branch, "[tid:%i]: BTB doesn't have a "
262 "valid entry.\n",tid);
263 pred_taken = false;
264 // The Direction of the branch predictor is altered
265 // because the BTB did not have an entry
266 // The predictor needs to be updated accordingly
267 if (!inst->isCall() && !inst->isReturn()) {
268 btbUpdate(pc.instAddr(), bp_history);
268 btbUpdate(tid, pc.instAddr(), bp_history);
269 DPRINTF(Branch, "[tid:%i]:[sn:%i] btbUpdate"
270 " called for %s\n", tid, seqNum, pc);
271 } else if (inst->isCall() && !inst->isUncondCtrl()) {
272 RAS[tid].pop();
273 predict_record.pushedRAS = false;
274 }
275 TheISA::advancePC(target, inst);
276 }
277 } else {
278 predict_record.wasIndirect = true;
279 ++indirectLookups;
280 //Consult indirect predictor on indirect control
269 DPRINTF(Branch, "[tid:%i]:[sn:%i] btbUpdate"
270 " called for %s\n", tid, seqNum, pc);
271 } else if (inst->isCall() && !inst->isUncondCtrl()) {
272 RAS[tid].pop();
273 predict_record.pushedRAS = false;
274 }
275 TheISA::advancePC(target, inst);
276 }
277 } else {
278 predict_record.wasIndirect = true;
279 ++indirectLookups;
280 //Consult indirect predictor on indirect control
281 if (iPred.lookup(pc.instAddr(), getGHR(bp_history), target,
282 tid)) {
281 if (iPred.lookup(pc.instAddr(), getGHR(tid, bp_history),
282 target, tid)) {
283 // Indirect predictor hit
284 ++indirectHits;
285 DPRINTF(Branch, "[tid:%i]: Instruction %s predicted "
286 "indirect target is %s.\n", tid, pc, target);
287 } else {
288 ++indirectMisses;
289 pred_taken = false;
290 DPRINTF(Branch, "[tid:%i]: Instruction %s no indirect "

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341 inst->disassemble(instPC.instAddr()), instPC);
342
343 void *bp_history = NULL;
344
345 if (inst->isUncondCtrl()) {
346 DPRINTF(Branch, "[tid:%i] Unconditional control.\n", tid);
347 pred_taken = true;
348 // Tell the BP there was an unconditional branch.
283 // Indirect predictor hit
284 ++indirectHits;
285 DPRINTF(Branch, "[tid:%i]: Instruction %s predicted "
286 "indirect target is %s.\n", tid, pc, target);
287 } else {
288 ++indirectMisses;
289 pred_taken = false;
290 DPRINTF(Branch, "[tid:%i]: Instruction %s no indirect "

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341 inst->disassemble(instPC.instAddr()), instPC);
342
343 void *bp_history = NULL;
344
345 if (inst->isUncondCtrl()) {
346 DPRINTF(Branch, "[tid:%i] Unconditional control.\n", tid);
347 pred_taken = true;
348 // Tell the BP there was an unconditional branch.
349 uncondBranch(instPC.instAddr(), bp_history);
349 uncondBranch(tid, instPC.instAddr(), bp_history);
350
351 if (inst->isReturn() && RAS[tid].empty()) {
352 DPRINTF(Branch, "[tid:%i] RAS is empty, predicting "
353 "false.\n", tid);
354 pred_taken = false;
355 }
356 } else {
357 ++condPredicted;
358
350
351 if (inst->isReturn() && RAS[tid].empty()) {
352 DPRINTF(Branch, "[tid:%i] RAS is empty, predicting "
353 "false.\n", tid);
354 pred_taken = false;
355 }
356 } else {
357 ++condPredicted;
358
359 pred_taken = lookup(predPC.instAddr(), bp_history);
359 pred_taken = lookup(tid, predPC.instAddr(), bp_history);
360 }
361
362 PredictorHistory predict_record(seqNum, predPC.instAddr(), pred_taken,
363 bp_history, tid);
364
365 // Now lookup in the BTB or RAS.
366 if (pred_taken) {
367 if (inst->isReturn()) {

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446 DPRINTF(Branch, "[tid:%i]: Committing branches until "
447 "[sn:%lli].\n", tid, done_sn);
448
449 iPred.commit(done_sn, tid);
450 while (!predHist[tid].empty() &&
451 predHist[tid].back().seqNum <= done_sn) {
452 // Update the branch predictor with the correct results.
453 if (!predHist[tid].back().wasSquashed) {
360 }
361
362 PredictorHistory predict_record(seqNum, predPC.instAddr(), pred_taken,
363 bp_history, tid);
364
365 // Now lookup in the BTB or RAS.
366 if (pred_taken) {
367 if (inst->isReturn()) {

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446 DPRINTF(Branch, "[tid:%i]: Committing branches until "
447 "[sn:%lli].\n", tid, done_sn);
448
449 iPred.commit(done_sn, tid);
450 while (!predHist[tid].empty() &&
451 predHist[tid].back().seqNum <= done_sn) {
452 // Update the branch predictor with the correct results.
453 if (!predHist[tid].back().wasSquashed) {
454 update(predHist[tid].back().pc, predHist[tid].back().predTaken,
455 predHist[tid].back().bpHistory, false);
454 update(tid, predHist[tid].back().pc,
455 predHist[tid].back().predTaken,
456 predHist[tid].back().bpHistory, false);
456 } else {
457 } else {
457 retireSquashed(predHist[tid].back().bpHistory);
458 retireSquashed(tid, predHist[tid].back().bpHistory);
458 }
459
460 predHist[tid].pop_back();
461 }
462}
463
464void
465BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid)

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480 // Was a call but predicated false. Pop RAS here
481 DPRINTF(Branch, "[tid: %i] Squashing"
482 " Call [sn:%i] PC: %s Popping RAS\n", tid,
483 pred_hist.front().seqNum, pred_hist.front().pc);
484 RAS[tid].pop();
485 }
486
487 // This call should delete the bpHistory.
459 }
460
461 predHist[tid].pop_back();
462 }
463}
464
465void
466BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid)

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481 // Was a call but predicated false. Pop RAS here
482 DPRINTF(Branch, "[tid: %i] Squashing"
483 " Call [sn:%i] PC: %s Popping RAS\n", tid,
484 pred_hist.front().seqNum, pred_hist.front().pc);
485 RAS[tid].pop();
486 }
487
488 // This call should delete the bpHistory.
488 squash(pred_hist.front().bpHistory);
489 squash(tid, pred_hist.front().bpHistory);
489
490 DPRINTF(Branch, "[tid:%i]: Removing history for [sn:%i] "
491 "PC %s.\n", tid, pred_hist.front().seqNum,
492 pred_hist.front().pc);
493
494 pred_hist.pop_front();
495
496 DPRINTF(Branch, "[tid:%i]: predHist.size(): %i\n",

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545
546 if ((*hist_it).usedRAS) {
547 ++RASIncorrect;
548 DPRINTF(Branch, "[tid:%i]: Incorrect RAS [sn:%i]\n",
549 tid, hist_it->seqNum);
550 }
551
552 // Have to get GHR here because the update deletes bpHistory
490
491 DPRINTF(Branch, "[tid:%i]: Removing history for [sn:%i] "
492 "PC %s.\n", tid, pred_hist.front().seqNum,
493 pred_hist.front().pc);
494
495 pred_hist.pop_front();
496
497 DPRINTF(Branch, "[tid:%i]: predHist.size(): %i\n",

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546
547 if ((*hist_it).usedRAS) {
548 ++RASIncorrect;
549 DPRINTF(Branch, "[tid:%i]: Incorrect RAS [sn:%i]\n",
550 tid, hist_it->seqNum);
551 }
552
553 // Have to get GHR here because the update deletes bpHistory
553 unsigned ghr = getGHR(hist_it->bpHistory);
554 unsigned ghr = getGHR(tid, hist_it->bpHistory);
554
555
555 update((*hist_it).pc, actually_taken,
556 update(tid, (*hist_it).pc, actually_taken,
556 pred_hist.front().bpHistory, true);
557 hist_it->wasSquashed = true;
558
559 if (actually_taken) {
560 if (hist_it->wasReturn && !hist_it->usedRAS) {
561 DPRINTF(Branch, "[tid: %i] Incorrectly predicted"
562 " return [sn:%i] PC: %s\n", tid, hist_it->seqNum,
563 hist_it->pc);

--- 62 unchanged lines hidden --- 		557 pred_hist.front().bpHistory, true);
558 hist_it->wasSquashed = true;
559
560 if (actually_taken) {
561 if (hist_it->wasReturn && !hist_it->usedRAS) {
562 DPRINTF(Branch, "[tid: %i] Incorrectly predicted"
563 " return [sn:%i] PC: %s\n", tid, hist_it->seqNum,
564 hist_it->pc);

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