thread_context_impl.hh (9920:028e4da64b42) thread_context_impl.hh (9944:4ff1c5c6dcbc)
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Kevin Lim
42 * Korey Sewell
43 */
44
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 28 unchanged lines hidden (view full) ---

37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Kevin Lim
42 * Korey Sewell
43 */
44
45#ifndef __CPU_O3_THREAD_CONTEXT_IMPL_HH__
46#define __CPU_O3_THREAD_CONTEXT_IMPL_HH__
47
45#include "arch/kernel_stats.hh"
46#include "arch/registers.hh"
47#include "config/the_isa.hh"
48#include "cpu/o3/thread_context.hh"
49#include "cpu/quiesce_event.hh"
50#include "debug/O3CPU.hh"
51
52template <class Impl>

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292void
293O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
294{
295 cpu->setMiscRegNoEffect(misc_reg, val, thread->threadId());
296
297 conditionalSquash();
298}
299
48#include "arch/kernel_stats.hh"
49#include "arch/registers.hh"
50#include "config/the_isa.hh"
51#include "cpu/o3/thread_context.hh"
52#include "cpu/quiesce_event.hh"
53#include "debug/O3CPU.hh"
54
55template <class Impl>

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295void
296O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
297{
298 cpu->setMiscRegNoEffect(misc_reg, val, thread->threadId());
299
300 conditionalSquash();
301}
302
303#endif//__CPU_O3_THREAD_CONTEXT_IMPL_HH__
300template <class Impl>
301void
302O3ThreadContext<Impl>::setMiscReg(int misc_reg, const MiscReg &val)
303{
304 cpu->setMiscReg(misc_reg, val, thread->threadId());
305
306 conditionalSquash();
307}
308
304template <class Impl>
305void
306O3ThreadContext<Impl>::setMiscReg(int misc_reg, const MiscReg &val)
307{
308 cpu->setMiscReg(misc_reg, val, thread->threadId());
309
310 conditionalSquash();
311}
312