thread_context_impl.hh (8852:c744483edfcf) thread_context_impl.hh (8887:20ea02da9c53)
1/*
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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39 *
40 * Authors: Kevin Lim
41 * Korey Sewell
42 */
43
44#include "arch/kernel_stats.hh"
45#include "arch/registers.hh"
46#include "config/the_isa.hh"
1/*
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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39 *
40 * Authors: Kevin Lim
41 * Korey Sewell
42 */
43
44#include "arch/kernel_stats.hh"
45#include "arch/registers.hh"
46#include "config/the_isa.hh"
47#include "config/use_checker.hh"
48#include "cpu/o3/thread_context.hh"
49#include "cpu/quiesce_event.hh"
50#include "debug/O3CPU.hh"
51
52template <class Impl>
53FSTranslatingPortProxy&
54O3ThreadContext<Impl>::getVirtProxy()
55{

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292 cpu->pcState(val, thread->threadId());
293
294 // Squash if we're not already in a state update mode.
295 if (!thread->trapPending && !thread->inSyscall) {
296 cpu->squashFromTC(thread->threadId());
297 }
298}
299
47#include "cpu/o3/thread_context.hh"
48#include "cpu/quiesce_event.hh"
49#include "debug/O3CPU.hh"
50
51template <class Impl>
52FSTranslatingPortProxy&
53O3ThreadContext<Impl>::getVirtProxy()
54{

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291 cpu->pcState(val, thread->threadId());
292
293 // Squash if we're not already in a state update mode.
294 if (!thread->trapPending && !thread->inSyscall) {
295 cpu->squashFromTC(thread->threadId());
296 }
297}
298
300#if USE_CHECKER
301template <class Impl>
302void
303O3ThreadContext<Impl>::pcStateNoRecord(const TheISA::PCState &val)
304{
305 cpu->pcState(val, thread->threadId());
306
307 // Squash if we're not already in a state update mode.
308 if (!thread->trapPending && !thread->inSyscall) {
309 cpu->squashFromTC(thread->threadId());
310 }
311}
299template <class Impl>
300void
301O3ThreadContext<Impl>::pcStateNoRecord(const TheISA::PCState &val)
302{
303 cpu->pcState(val, thread->threadId());
304
305 // Squash if we're not already in a state update mode.
306 if (!thread->trapPending && !thread->inSyscall) {
307 cpu->squashFromTC(thread->threadId());
308 }
309}
312#endif
313
314template <class Impl>
315int
316O3ThreadContext<Impl>::flattenIntIndex(int reg)
317{
318 return cpu->isa[thread->threadId()].flattenIntIndex(reg);
319}
320

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311template <class Impl>
312int
313O3ThreadContext<Impl>::flattenIntIndex(int reg)
314{
315 return cpu->isa[thread->threadId()].flattenIntIndex(reg);
316}
317

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