235a236,249
> const TheISA::VecPredRegContainer&
> O3ThreadContext<Impl>::readVecPredRegFlat(int reg_id) const
> {
> return cpu->readArchVecPredReg(reg_id, thread->threadId());
> }
>
> template <class Impl>
> TheISA::VecPredRegContainer&
> O3ThreadContext<Impl>::getWritableVecPredRegFlat(int reg_id)
> {
> return cpu->getWritableArchVecPredReg(reg_id, thread->threadId());
> }
>
> template <class Impl>
279a294,303
> O3ThreadContext<Impl>::setVecPredRegFlat(int reg_idx,
> const VecPredRegContainer& val)
> {
> cpu->setArchVecPredReg(reg_idx, val, thread->threadId());
>
> conditionalSquash();
> }
>
> template <class Impl>
> void