1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

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204template <class Impl>
205TheISA::FloatRegBits
206O3ThreadContext<Impl>::readFloatRegBitsFlat(int reg_idx)
207{
208 return cpu->readArchFloatRegInt(reg_idx, thread->threadId());
209}
210
211template <class Impl>
212TheISA::CCReg
213O3ThreadContext<Impl>::readCCRegFlat(int reg_idx)
214{
215 return cpu->readArchCCReg(reg_idx, thread->threadId());
216}
217
218template <class Impl>
219void

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239{
240 cpu->setArchFloatRegInt(reg_idx, val, thread->threadId());
241
242 conditionalSquash();
243}
244
245template <class Impl>
246void
247O3ThreadContext<Impl>::setCCRegFlat(int reg_idx, TheISA::CCReg val)
248{
249 cpu->setArchCCReg(reg_idx, val, thread->threadId());
250
251 conditionalSquash();
252}
253
254template <class Impl>

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