store_set.hh (6221:58a3c04e6344) store_set.hh (8519:ef35ce2bd73f)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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58 public:
59 typedef unsigned SSID;
60
61 public:
62 /** Default constructor. init() must be called prior to use. */
63 StoreSet() { };
64
65 /** Creates store set predictor with given table sizes. */
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 49 unchanged lines hidden (view full) ---

58 public:
59 typedef unsigned SSID;
60
61 public:
62 /** Default constructor. init() must be called prior to use. */
63 StoreSet() { };
64
65 /** Creates store set predictor with given table sizes. */
66 StoreSet(int SSIT_size, int LFST_size);
66 StoreSet(uint64_t clear_period, int SSIT_size, int LFST_size);
67
68 /** Default destructor. */
69 ~StoreSet();
70
71 /** Initializes the store set predictor with the given table sizes. */
67
68 /** Default destructor. */
69 ~StoreSet();
70
71 /** Initializes the store set predictor with the given table sizes. */
72 void init(int SSIT_size, int LFST_size);
72 void init(uint64_t clear_period, int SSIT_size, int LFST_size);
73
74 /** Records a memory ordering violation between the younger load
75 * and the older store. */
76 void violation(Addr store_PC, Addr load_PC);
77
73
74 /** Records a memory ordering violation between the younger load
75 * and the older store. */
76 void violation(Addr store_PC, Addr load_PC);
77
78 /** Clears the store set predictor every so often so that all the
79 * entries aren't used and stores are constantly predicted as
80 * conflicting.
81 */
82 void checkClear();
83
78 /** Inserts a load into the store set predictor. This does nothing but
79 * is included in case other predictors require a similar function.
80 */
81 void insertLoad(Addr load_PC, InstSeqNum load_seq_num);
82
83 /** Inserts a store into the store set predictor. Updates the
84 * LFST if the store has a valid SSID. */
85 void insertStore(Addr store_PC, InstSeqNum store_seq_num, ThreadID tid);

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125
126 /** Map of stores that have been inserted into the store set, but
127 * not yet issued or squashed.
128 */
129 std::map<InstSeqNum, int, ltseqnum> storeList;
130
131 typedef std::map<InstSeqNum, int, ltseqnum>::iterator SeqNumMapIt;
132
84 /** Inserts a load into the store set predictor. This does nothing but
85 * is included in case other predictors require a similar function.
86 */
87 void insertLoad(Addr load_PC, InstSeqNum load_seq_num);
88
89 /** Inserts a store into the store set predictor. Updates the
90 * LFST if the store has a valid SSID. */
91 void insertStore(Addr store_PC, InstSeqNum store_seq_num, ThreadID tid);

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131
132 /** Map of stores that have been inserted into the store set, but
133 * not yet issued or squashed.
134 */
135 std::map<InstSeqNum, int, ltseqnum> storeList;
136
137 typedef std::map<InstSeqNum, int, ltseqnum>::iterator SeqNumMapIt;
138
139 /** Number of loads/stores to process before wiping predictor so all
140 * entries don't get saturated
141 */
142 uint64_t clearPeriod;
143
133 /** Store Set ID Table size, in entries. */
134 int SSITSize;
135
136 /** Last Fetched Store Table size, in entries. */
137 int LFSTSize;
138
139 /** Mask to obtain the index. */
140 int indexMask;
141
142 // HACK: Hardcoded for now.
143 int offsetBits;
144 /** Store Set ID Table size, in entries. */
145 int SSITSize;
146
147 /** Last Fetched Store Table size, in entries. */
148 int LFSTSize;
149
150 /** Mask to obtain the index. */
151 int indexMask;
152
153 // HACK: Hardcoded for now.
154 int offsetBits;
155
156 /** Number of memory operations predicted since last clear of predictor */
157 int memOpsPred;
144};
145
146#endif // __CPU_O3_STORE_SET_HH__
158};
159
160#endif // __CPU_O3_STORE_SET_HH__