1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __CPU_O3_CPU_STORE_SET_HH__
30#define __CPU_O3_CPU_STORE_SET_HH__
31
32#include <vector>
33
34#include "arch/isa_traits.hh"
35#include "cpu/inst_seq.hh"
36
37class StoreSet
38{
39 public:
40 typedef unsigned SSID;
41
42 public:
43 StoreSet(int SSIT_size, int LFST_size);
44
45 void violation(Addr store_PC, Addr load_PC);
46
47 void insertLoad(Addr load_PC, InstSeqNum load_seq_num);
48
49 void insertStore(Addr store_PC, InstSeqNum store_seq_num);
50
51 InstSeqNum checkInst(Addr PC);
52
53 void issued(Addr issued_PC, InstSeqNum issued_seq_num, bool is_store);
54
55 void squash(InstSeqNum squashed_num);
56
57 void clear();
58
59 private:
60 inline int calcIndex(Addr PC)
61 { return (PC >> offset_bits) & index_mask; }
62
63 inline SSID calcSSID(Addr PC)
64 { return ((PC ^ (PC >> 10)) % LFST_size); }
65
66 SSID *SSIT;
67
68 std::vector<bool> validSSIT;
69
70 InstSeqNum *LFST;
71
72 std::vector<bool> validLFST;
73
74 int *SSCounters;
75
76 int SSIT_size;
77
78 int LFST_size;
79
80 int index_mask;
81
82 // HACK: Hardcoded for now.
83 int offset_bits;
84};
85
86#endif // __CPU_O3_CPU_STORE_SET_HH__