1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_O3_CPU_STORE_SET_HH__
32#define __CPU_O3_CPU_STORE_SET_HH__
33
34#include <vector>
35
36#include "arch/isa_traits.hh"
37#include "cpu/inst_seq.hh"
38
39class StoreSet
40{
41 public:
42 typedef unsigned SSID;
43
44 public:
45 StoreSet(int SSIT_size, int LFST_size);
46
47 void violation(Addr store_PC, Addr load_PC);
48
49 void insertLoad(Addr load_PC, InstSeqNum load_seq_num);
50
51 void insertStore(Addr store_PC, InstSeqNum store_seq_num);
52
53 InstSeqNum checkInst(Addr PC);
54
55 void issued(Addr issued_PC, InstSeqNum issued_seq_num, bool is_store);
56
57 void squash(InstSeqNum squashed_num);
58
59 void clear();
60
61 private:
62 inline int calcIndex(Addr PC)
63 { return (PC >> offset_bits) & index_mask; }
64
65 inline SSID calcSSID(Addr PC)
66 { return ((PC ^ (PC >> 10)) % LFST_size); }
67
68 SSID *SSIT;
69
70 std::vector<bool> validSSIT;
71
72 InstSeqNum *LFST;
73
74 std::vector<bool> validLFST;
75
76 int *SSCounters;
77
78 int SSIT_size;
79
80 int LFST_size;
81
82 int index_mask;
83
84 // HACK: Hardcoded for now.
85 int offset_bits;
86};
87
88#endif // __CPU_O3_CPU_STORE_SET_HH__