scoreboard.hh (12105:742d80361989) | scoreboard.hh (12106:7784fac1b159) |
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1/* 2 * Copyright (c) 2005-2006 The Regents of The University of Michigan 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 66 unchanged lines hidden (view full) --- 75 ~Scoreboard() {} 76 77 /** Returns the name of the scoreboard. */ 78 std::string name() const { return _name; }; 79 80 /** Checks if the register is ready. */ 81 bool getReg(PhysRegIdPtr phys_reg) const 82 { | 1/* 2 * Copyright (c) 2005-2006 The Regents of The University of Michigan 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 66 unchanged lines hidden (view full) --- 75 ~Scoreboard() {} 76 77 /** Returns the name of the scoreboard. */ 78 std::string name() const { return _name; }; 79 80 /** Checks if the register is ready. */ 81 bool getReg(PhysRegIdPtr phys_reg) const 82 { |
83 assert(phys_reg->flatIdx < numPhysRegs); | 83 assert(phys_reg->flatIndex() < numPhysRegs); |
84 85 if (phys_reg->isFixedMapping()) { 86 // Fixed mapping regs are always ready 87 return true; 88 } 89 | 84 85 if (phys_reg->isFixedMapping()) { 86 // Fixed mapping regs are always ready 87 return true; 88 } 89 |
90 bool ready = regScoreBoard[phys_reg->flatIdx]; | 90 bool ready = regScoreBoard[phys_reg->flatIndex()]; |
91 92 if (phys_reg->isZeroReg()) 93 assert(ready); 94 95 return ready; 96 } 97 98 /** Sets the register as ready. */ 99 void setReg(PhysRegIdPtr phys_reg) 100 { | 91 92 if (phys_reg->isZeroReg()) 93 assert(ready); 94 95 return ready; 96 } 97 98 /** Sets the register as ready. */ 99 void setReg(PhysRegIdPtr phys_reg) 100 { |
101 assert(phys_reg->flatIdx < numPhysRegs); | 101 assert(phys_reg->flatIndex() < numPhysRegs); |
102 103 if (phys_reg->isFixedMapping()) { 104 // Fixed mapping regs are always ready, ignore attempts to change 105 // that 106 return; 107 } 108 | 102 103 if (phys_reg->isFixedMapping()) { 104 // Fixed mapping regs are always ready, ignore attempts to change 105 // that 106 return; 107 } 108 |
109 DPRINTF(Scoreboard, "Setting reg %i (%s) as ready\n", phys_reg->regIdx, 110 RegClassStrings[phys_reg->regClass]); | 109 DPRINTF(Scoreboard, "Setting reg %i (%s) as ready\n", 110 phys_reg->index(), phys_reg->className()); |
111 | 111 |
112 regScoreBoard[phys_reg->flatIdx] = true; | 112 regScoreBoard[phys_reg->flatIndex()] = true; |
113 } 114 115 /** Sets the register as not ready. */ 116 void unsetReg(PhysRegIdPtr phys_reg) 117 { | 113 } 114 115 /** Sets the register as not ready. */ 116 void unsetReg(PhysRegIdPtr phys_reg) 117 { |
118 assert(phys_reg->flatIdx < numPhysRegs); | 118 assert(phys_reg->flatIndex() < numPhysRegs); |
119 120 if (phys_reg->isFixedMapping()) { 121 // Fixed mapping regs are always ready, ignore attempts to 122 // change that 123 return; 124 } 125 126 // zero reg should never be marked unready 127 if (phys_reg->isZeroReg()) 128 return; 129 | 119 120 if (phys_reg->isFixedMapping()) { 121 // Fixed mapping regs are always ready, ignore attempts to 122 // change that 123 return; 124 } 125 126 // zero reg should never be marked unready 127 if (phys_reg->isZeroReg()) 128 return; 129 |
130 regScoreBoard[phys_reg->flatIdx] = false; | 130 regScoreBoard[phys_reg->flatIndex()] = false; |
131 } 132 133}; 134 135#endif | 131 } 132 133}; 134 135#endif |