1/* 2 * Copyright (c) 2005-2006 The Regents of The University of Michigan
| 1/* 2 * Copyright (c) 2005-2006 The Regents of The University of Michigan
|
| 3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
|
3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Korey Sewell 29 * Kevin Lim
| 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Korey Sewell 30 * Kevin Lim
|
| 31 * Steve Reinhardt
|
30 */ 31 32#ifndef __CPU_O3_SCOREBOARD_HH__ 33#define __CPU_O3_SCOREBOARD_HH__ 34 35#include <iostream> 36#include <utility> 37#include <vector> 38 39#include "base/trace.hh"
| 32 */ 33 34#ifndef __CPU_O3_SCOREBOARD_HH__ 35#define __CPU_O3_SCOREBOARD_HH__ 36 37#include <iostream> 38#include <utility> 39#include <vector> 40 41#include "base/trace.hh"
|
| 42#include "config/the_isa.hh"
|
40#include "cpu/o3/comm.hh"
| 43#include "cpu/o3/comm.hh"
|
| 44#include "debug/Scoreboard.hh"
|
41 42/**
| 45 46/**
|
43 * Implements a simple scoreboard to track which registers are ready. 44 * This class assumes that the fp registers start, index wise, right after 45 * the integer registers. The misc. registers start, index wise, right after 46 * the fp registers. 47 * @todo: Fix up handling of the zero register in case the decoder does not 48 * automatically make insts that write the zero register into nops.
| 47 * Implements a simple scoreboard to track which registers are 48 * ready. This class operates on the unified physical register space, 49 * so integer and floating-point registers are not distinguished. For 50 * convenience, it also accepts operations on the physical-space 51 * mapping of misc registers, which are numbered starting after the 52 * end of the actual physical register file. However, there is no 53 * actual scoreboard for misc registers, and they are always 54 * considered ready.
|
49 */ 50class Scoreboard 51{
| 55 */ 56class Scoreboard 57{
|
| 58 private: 59 /** The object name, for DPRINTF. We have to declare this 60 * explicitly because Scoreboard is not a SimObject. */ 61 const std::string _name; 62 63 /** Scoreboard of physical integer registers, saying whether or not they 64 * are ready. */ 65 std::vector<bool> regScoreBoard; 66 67 /** The number of actual physical registers */ 68 unsigned numPhysRegs; 69 70 /** 71 * The total number of registers which can be indexed, including 72 * the misc registers that come after the physical registers and 73 * which are hardwired to be always considered ready. 74 */ 75 unsigned numTotalRegs; 76 77 /** The index of the zero register. */ 78 PhysRegIndex zeroRegIdx; 79 80 /** The index of the FP zero register. */ 81 PhysRegIndex fpZeroRegIdx; 82 83 bool isZeroReg(PhysRegIndex idx) const 84 { 85 return (idx == zeroRegIdx || 86 (THE_ISA == ALPHA_ISA && idx == fpZeroRegIdx)); 87 } 88
|
52 public: 53 /** Constructs a scoreboard.
| 89 public: 90 /** Constructs a scoreboard.
|
54 * @param activeThreads The number of active threads. 55 * @param _numLogicalIntRegs Number of logical integer registers. 56 * @param _numPhysicalIntRegs Number of physical integer registers. 57 * @param _numLogicalFloatRegs Number of logical fp registers. 58 * @param _numPhysicalFloatRegs Number of physical fp registers.
| 91 * @param _numPhysicalRegs Number of physical registers.
|
59 * @param _numMiscRegs Number of miscellaneous registers. 60 * @param _zeroRegIdx Index of the zero register.
| 92 * @param _numMiscRegs Number of miscellaneous registers. 93 * @param _zeroRegIdx Index of the zero register.
|
| 94 * @param _fpZeroRegIdx Index of the FP zero register (if any, currently 95 * used only for Alpha).
|
61 */
| 96 */
|
62 Scoreboard(unsigned activeThreads, 63 unsigned _numLogicalIntRegs, 64 unsigned _numPhysicalIntRegs, 65 unsigned _numLogicalFloatRegs, 66 unsigned _numPhysicalFloatRegs,
| 97 Scoreboard(const std::string &_my_name, 98 unsigned _numPhysicalRegs,
|
67 unsigned _numMiscRegs,
| 99 unsigned _numMiscRegs,
|
68 unsigned _zeroRegIdx);
| 100 PhysRegIndex _zeroRegIdx, 101 PhysRegIndex _fpZeroRegIdx);
|
69 70 /** Destructor. */ 71 ~Scoreboard() {} 72 73 /** Returns the name of the scoreboard. */
| 102 103 /** Destructor. */ 104 ~Scoreboard() {} 105 106 /** Returns the name of the scoreboard. */
|
74 std::string name() const;
| 107 std::string name() const { return _name; };
|
75 76 /** Checks if the register is ready. */
| 108 109 /** Checks if the register is ready. */
|
77 bool getReg(PhysRegIndex ready_reg);
| 110 bool getReg(PhysRegIndex reg_idx) const 111 { 112 assert(reg_idx < numTotalRegs);
|
78
| 113
|
79 /** Sets the register as ready. */ 80 void setReg(PhysRegIndex phys_reg);
| 114 if (reg_idx >= numPhysRegs) { 115 // misc regs are always ready 116 return true; 117 }
|
81
| 118
|
82 /** Sets the register as not ready. */ 83 void unsetReg(PhysRegIndex ready_reg);
| 119 bool ready = regScoreBoard[reg_idx];
|
84
| 120
|
85 private: 86 /** Scoreboard of physical integer registers, saying whether or not they 87 * are ready. 88 */ 89 std::vector<bool> regScoreBoard;
| 121 if (isZeroReg(reg_idx)) 122 assert(ready);
|
90
| 123
|
91 /** Number of logical integer registers. */ 92 int numLogicalIntRegs;
| 124 return ready; 125 }
|
93
| 126
|
94 /** Number of physical integer registers. */ 95 int numPhysicalIntRegs;
| 127 /** Sets the register as ready. */ 128 void setReg(PhysRegIndex reg_idx) 129 { 130 assert(reg_idx < numTotalRegs);
|
96
| 131
|
97 /** Number of logical floating point registers. */ 98 int numLogicalFloatRegs;
| 132 if (reg_idx >= numPhysRegs) { 133 // misc regs are always ready, ignore attempts to change that 134 return; 135 }
|
99
| 136
|
100 /** Number of physical floating point registers. */ 101 int numPhysicalFloatRegs;
| 137 DPRINTF(Scoreboard, "Setting reg %i as ready\n", reg_idx);
|
102
| 138
|
103 /** Number of miscellaneous registers. */ 104 int numMiscRegs;
| 139 assert(reg_idx < numTotalRegs); 140 regScoreBoard[reg_idx] = true; 141 }
|
105
| 142
|
106 /** Number of logical integer + float registers. */ 107 int numLogicalRegs;
| 143 /** Sets the register as not ready. */ 144 void unsetReg(PhysRegIndex reg_idx) 145 { 146 assert(reg_idx < numTotalRegs);
|
108
| 147
|
109 /** Number of physical integer + float registers. */ 110 int numPhysicalRegs;
| 148 if (reg_idx >= numPhysRegs) { 149 // misc regs are always ready, ignore attempts to change that 150 return; 151 }
|
111
| 152
|
112 /** The logical index of the zero register. */ 113 int zeroRegIdx;
| 153 // zero reg should never be marked unready 154 if (isZeroReg(reg_idx)) 155 return;
|
114
| 156
|
115 int currentSize; 116 117 void 118 resize(int newSize) 119 { 120 currentSize = newSize; 121 regScoreBoard.resize(newSize);
| 157 regScoreBoard[reg_idx] = false;
|
122 } 123
| 158 } 159
|
124 bool 125 indexInBounds(int idx) 126 { 127 return idx < currentSize; 128 }
| |
129}; 130 131#endif
| 160}; 161 162#endif
|