rob_impl.hh (6221:58a3c04e6344) | rob_impl.hh (7717:f166f8bd8818) |
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1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 188 unchanged lines hidden (view full) --- 197{ 198 return instList[tid].size(); 199} 200 201template <class Impl> 202void 203ROB<Impl>::insertInst(DynInstPtr &inst) 204{ | 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 188 unchanged lines hidden (view full) --- 197{ 198 return instList[tid].size(); 199} 200 201template <class Impl> 202void 203ROB<Impl>::insertInst(DynInstPtr &inst) 204{ |
205 //assert(numInstsInROB == countInsts()); | |
206 assert(inst); 207 208 DPRINTF(ROB, "Adding inst PC %#x to the ROB.\n", inst->readPC()); 209 210 assert(numInstsInROB != numEntries); 211 212 ThreadID tid = inst->threadNumber; 213 --- 15 unchanged lines hidden (view full) --- 229 ++numInstsInROB; 230 ++threadEntries[tid]; 231 232 assert((*tail) == inst); 233 234 DPRINTF(ROB, "[tid:%i] Now has %d instructions.\n", tid, threadEntries[tid]); 235} 236 | 205 assert(inst); 206 207 DPRINTF(ROB, "Adding inst PC %#x to the ROB.\n", inst->readPC()); 208 209 assert(numInstsInROB != numEntries); 210 211 ThreadID tid = inst->threadNumber; 212 --- 15 unchanged lines hidden (view full) --- 228 ++numInstsInROB; 229 ++threadEntries[tid]; 230 231 assert((*tail) == inst); 232 233 DPRINTF(ROB, "[tid:%i] Now has %d instructions.\n", tid, threadEntries[tid]); 234} 235 |
237// Whatever calls this function needs to ensure that it properly frees up 238// registers prior to this function. 239/* | |
240template <class Impl> 241void | 236template <class Impl> 237void |
242ROB<Impl>::retireHead() 243{ 244 //assert(numInstsInROB == countInsts()); 245 assert(numInstsInROB > 0); 246 247 ThreadID tid = (*head)->threadNumber; 248 249 retireHead(tid); 250 251 if (numInstsInROB == 0) { 252 tail = instList[tid].end(); 253 } 254} 255*/ 256 257template <class Impl> 258void | |
259ROB<Impl>::retireHead(ThreadID tid) 260{ | 238ROB<Impl>::retireHead(ThreadID tid) 239{ |
261 //assert(numInstsInROB == countInsts()); | |
262 assert(numInstsInROB > 0); 263 264 // Get the head ROB instruction. 265 InstIt head_it = instList[tid].begin(); 266 267 DynInstPtr head_inst = (*head_it); 268 269 assert(head_inst->readyToCommit()); --- 13 unchanged lines hidden (view full) --- 283 //Update "Global" Head of ROB 284 updateHead(); 285 286 // @todo: A special case is needed if the instruction being 287 // retired is the only instruction in the ROB; otherwise the tail 288 // iterator will become invalidated. 289 cpu->removeFrontInst(head_inst); 290} | 240 assert(numInstsInROB > 0); 241 242 // Get the head ROB instruction. 243 InstIt head_it = instList[tid].begin(); 244 245 DynInstPtr head_inst = (*head_it); 246 247 assert(head_inst->readyToCommit()); --- 13 unchanged lines hidden (view full) --- 261 //Update "Global" Head of ROB 262 updateHead(); 263 264 // @todo: A special case is needed if the instruction being 265 // retired is the only instruction in the ROB; otherwise the tail 266 // iterator will become invalidated. 267 cpu->removeFrontInst(head_inst); 268} |
291/* 292template <class Impl> 293bool 294ROB<Impl>::isHeadReady() 295{ 296 if (numInstsInROB != 0) { 297 return (*head)->readyToCommit(); 298 } | |
299 | 269 |
300 return false; 301} 302*/ | |
303template <class Impl> 304bool 305ROB<Impl>::isHeadReady(ThreadID tid) 306{ 307 if (threadEntries[tid] != 0) { 308 return instList[tid].front()->readyToCommit(); 309 } 310 --- 18 unchanged lines hidden (view full) --- 329 330 return false; 331} 332 333template <class Impl> 334unsigned 335ROB<Impl>::numFreeEntries() 336{ | 270template <class Impl> 271bool 272ROB<Impl>::isHeadReady(ThreadID tid) 273{ 274 if (threadEntries[tid] != 0) { 275 return instList[tid].front()->readyToCommit(); 276 } 277 --- 18 unchanged lines hidden (view full) --- 296 297 return false; 298} 299 300template <class Impl> 301unsigned 302ROB<Impl>::numFreeEntries() 303{ |
337 //assert(numInstsInROB == countInsts()); 338 | |
339 return numEntries - numInstsInROB; 340} 341 342template <class Impl> 343unsigned 344ROB<Impl>::numFreeEntries(ThreadID tid) 345{ 346 return maxEntries[tid] - threadEntries[tid]; --- 180 unchanged lines hidden (view full) --- 527 InstIt tail_thread = instList[tid].end(); 528 tail_thread--; 529 530 squashIt[tid] = tail_thread; 531 532 doSquash(tid); 533 } 534} | 304 return numEntries - numInstsInROB; 305} 306 307template <class Impl> 308unsigned 309ROB<Impl>::numFreeEntries(ThreadID tid) 310{ 311 return maxEntries[tid] - threadEntries[tid]; --- 180 unchanged lines hidden (view full) --- 492 InstIt tail_thread = instList[tid].end(); 493 tail_thread--; 494 495 squashIt[tid] = tail_thread; 496 497 doSquash(tid); 498 } 499} |
535/* 536template <class Impl> 537typename Impl::DynInstPtr 538ROB<Impl>::readHeadInst() 539{ 540 if (numInstsInROB != 0) { 541 assert((*head)->isInROB()==true); 542 return *head; 543 } else { 544 return dummyInst; 545 } 546} 547*/ | |
548 549template <class Impl> 550typename Impl::DynInstPtr 551ROB<Impl>::readHeadInst(ThreadID tid) 552{ 553 if (threadEntries[tid] != 0) { 554 InstIt head_thread = instList[tid].begin(); 555 556 assert((*head_thread)->isInROB()==true); 557 558 return *head_thread; 559 } else { 560 return dummyInst; 561 } 562} 563 | 500 501template <class Impl> 502typename Impl::DynInstPtr 503ROB<Impl>::readHeadInst(ThreadID tid) 504{ 505 if (threadEntries[tid] != 0) { 506 InstIt head_thread = instList[tid].begin(); 507 508 assert((*head_thread)->isInROB()==true); 509 510 return *head_thread; 511 } else { 512 return dummyInst; 513 } 514} 515 |
564/* | |
565template <class Impl> | 516template <class Impl> |
566uint64_t 567ROB<Impl>::readHeadPC() 568{ 569 //assert(numInstsInROB == countInsts()); 570 571 DynInstPtr head_inst = *head; 572 573 return head_inst->readPC(); 574} 575 576template <class Impl> 577uint64_t 578ROB<Impl>::readHeadPC(ThreadID tid) 579{ 580 //assert(numInstsInROB == countInsts()); 581 InstIt head_thread = instList[tid].begin(); 582 583 return (*head_thread)->readPC(); 584} 585 586 587template <class Impl> 588uint64_t 589ROB<Impl>::readHeadNextPC() 590{ 591 //assert(numInstsInROB == countInsts()); 592 593 DynInstPtr head_inst = *head; 594 595 return head_inst->readNextPC(); 596} 597 598template <class Impl> 599uint64_t 600ROB<Impl>::readHeadNextPC(ThreadID tid) 601{ 602 //assert(numInstsInROB == countInsts()); 603 InstIt head_thread = instList[tid].begin(); 604 605 return (*head_thread)->readNextPC(); 606} 607 608template <class Impl> 609InstSeqNum 610ROB<Impl>::readHeadSeqNum() 611{ 612 //assert(numInstsInROB == countInsts()); 613 DynInstPtr head_inst = *head; 614 615 return head_inst->seqNum; 616} 617 618template <class Impl> 619InstSeqNum 620ROB<Impl>::readHeadSeqNum(ThreadID tid) 621{ 622 InstIt head_thread = instList[tid].begin(); 623 624 return ((*head_thread)->seqNum); 625} 626 627template <class Impl> | |
628typename Impl::DynInstPtr | 517typename Impl::DynInstPtr |
629ROB<Impl>::readTailInst() 630{ 631 //assert(numInstsInROB == countInsts()); 632 //assert(tail != instList[0].end()); 633 634 return (*tail); 635} 636*/ 637template <class Impl> 638typename Impl::DynInstPtr | |
639ROB<Impl>::readTailInst(ThreadID tid) 640{ | 518ROB<Impl>::readTailInst(ThreadID tid) 519{ |
641 //assert(tail_thread[tid] != instList[tid].end()); 642 | |
643 InstIt tail_thread = instList[tid].end(); 644 tail_thread--; 645 646 return *tail_thread; 647} 648 | 520 InstIt tail_thread = instList[tid].end(); 521 tail_thread--; 522 523 return *tail_thread; 524} 525 |
649/* 650template <class Impl> 651uint64_t 652ROB<Impl>::readTailPC() 653{ 654 //assert(numInstsInROB == countInsts()); 655 656 //assert(tail != instList[0].end()); 657 658 return (*tail)->readPC(); 659} 660 661template <class Impl> 662uint64_t 663ROB<Impl>::readTailPC(ThreadID tid) 664{ 665 //assert(tail_thread[tid] != instList[tid].end()); 666 667 InstIt tail_thread = instList[tid].end(); 668 tail_thread--; 669 670 return (*tail_thread)->readPC(); 671} 672 673template <class Impl> 674InstSeqNum 675ROB<Impl>::readTailSeqNum() 676{ 677 // Return the last sequence number that has not been squashed. Other 678 // stages can use it to squash any instructions younger than the current 679 // tail. 680 return (*tail)->seqNum; 681} 682 683template <class Impl> 684InstSeqNum 685ROB<Impl>::readTailSeqNum(ThreadID tid) 686{ 687 // Return the last sequence number that has not been squashed. Other 688 // stages can use it to squash any instructions younger than the current 689 // tail. 690 // assert(tail_thread[tid] != instList[tid].end()); 691 692 InstIt tail_thread = instList[tid].end(); 693 tail_thread--; 694 695 return (*tail_thread)->seqNum; 696} 697*/ | |