rob_impl.hh (13562:8fe39a3fc056) | rob_impl.hh (13831:4fba790d88be) |
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1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 240 unchanged lines hidden (view full) --- 249 // Get the head ROB instruction by copying it and remove it from the list 250 InstIt head_it = instList[tid].begin(); 251 252 DynInstPtr head_inst = std::move(*head_it); 253 instList[tid].erase(head_it); 254 255 assert(head_inst->readyToCommit()); 256 | 1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 240 unchanged lines hidden (view full) --- 249 // Get the head ROB instruction by copying it and remove it from the list 250 InstIt head_it = instList[tid].begin(); 251 252 DynInstPtr head_inst = std::move(*head_it); 253 instList[tid].erase(head_it); 254 255 assert(head_inst->readyToCommit()); 256 |
257 DPRINTF(ROB, "[tid:%u]: Retiring head instruction, " 258 "instruction PC %s, [sn:%lli]\n", tid, head_inst->pcState(), | 257 DPRINTF(ROB, "[tid:%i] Retiring head instruction, " 258 "instruction PC %s, [sn:%llu]\n", tid, head_inst->pcState(), |
259 head_inst->seqNum); 260 261 --numInstsInROB; 262 --threadEntries[tid]; 263 264 head_inst->clearInROB(); 265 head_inst->setCommitted(); 266 --- 51 unchanged lines hidden (view full) --- 318 return maxEntries[tid] - threadEntries[tid]; 319} 320 321template <class Impl> 322void 323ROB<Impl>::doSquash(ThreadID tid) 324{ 325 robWrites++; | 259 head_inst->seqNum); 260 261 --numInstsInROB; 262 --threadEntries[tid]; 263 264 head_inst->clearInROB(); 265 head_inst->setCommitted(); 266 --- 51 unchanged lines hidden (view full) --- 318 return maxEntries[tid] - threadEntries[tid]; 319} 320 321template <class Impl> 322void 323ROB<Impl>::doSquash(ThreadID tid) 324{ 325 robWrites++; |
326 DPRINTF(ROB, "[tid:%u]: Squashing instructions until [sn:%i].\n", | 326 DPRINTF(ROB, "[tid:%i] Squashing instructions until [sn:%llu].\n", |
327 tid, squashedSeqNum[tid]); 328 329 assert(squashIt[tid] != instList[tid].end()); 330 331 if ((*squashIt[tid])->seqNum < squashedSeqNum[tid]) { | 327 tid, squashedSeqNum[tid]); 328 329 assert(squashIt[tid] != instList[tid].end()); 330 331 if ((*squashIt[tid])->seqNum < squashedSeqNum[tid]) { |
332 DPRINTF(ROB, "[tid:%u]: Done squashing instructions.\n", | 332 DPRINTF(ROB, "[tid:%i] Done squashing instructions.\n", |
333 tid); 334 335 squashIt[tid] = instList[tid].end(); 336 337 doneSquashing[tid] = true; 338 return; 339 } 340 341 bool robTailUpdate = false; 342 343 for (int numSquashed = 0; 344 numSquashed < squashWidth && 345 squashIt[tid] != instList[tid].end() && 346 (*squashIt[tid])->seqNum > squashedSeqNum[tid]; 347 ++numSquashed) 348 { | 333 tid); 334 335 squashIt[tid] = instList[tid].end(); 336 337 doneSquashing[tid] = true; 338 return; 339 } 340 341 bool robTailUpdate = false; 342 343 for (int numSquashed = 0; 344 numSquashed < squashWidth && 345 squashIt[tid] != instList[tid].end() && 346 (*squashIt[tid])->seqNum > squashedSeqNum[tid]; 347 ++numSquashed) 348 { |
349 DPRINTF(ROB, "[tid:%u]: Squashing instruction PC %s, seq num %i.\n", | 349 DPRINTF(ROB, "[tid:%i] Squashing instruction PC %s, seq num %i.\n", |
350 (*squashIt[tid])->threadNumber, 351 (*squashIt[tid])->pcState(), 352 (*squashIt[tid])->seqNum); 353 354 // Mark the instruction as squashed, and ready to commit so that 355 // it can drain out of the pipeline. 356 (*squashIt[tid])->setSquashed(); 357 --- 18 unchanged lines hidden (view full) --- 376 robTailUpdate = true; 377 378 squashIt[tid]--; 379 } 380 381 382 // Check if ROB is done squashing. 383 if ((*squashIt[tid])->seqNum <= squashedSeqNum[tid]) { | 350 (*squashIt[tid])->threadNumber, 351 (*squashIt[tid])->pcState(), 352 (*squashIt[tid])->seqNum); 353 354 // Mark the instruction as squashed, and ready to commit so that 355 // it can drain out of the pipeline. 356 (*squashIt[tid])->setSquashed(); 357 --- 18 unchanged lines hidden (view full) --- 376 robTailUpdate = true; 377 378 squashIt[tid]--; 379 } 380 381 382 // Check if ROB is done squashing. 383 if ((*squashIt[tid])->seqNum <= squashedSeqNum[tid]) { |
384 DPRINTF(ROB, "[tid:%u]: Done squashing instructions.\n", | 384 DPRINTF(ROB, "[tid:%i] Done squashing instructions.\n", |
385 tid); 386 387 squashIt[tid] = instList[tid].end(); 388 389 doneSquashing[tid] = true; 390 } 391 392 if (robTailUpdate) { --- 83 unchanged lines hidden (view full) --- 476 477 478template <class Impl> 479void 480ROB<Impl>::squash(InstSeqNum squash_num, ThreadID tid) 481{ 482 if (isEmpty(tid)) { 483 DPRINTF(ROB, "Does not need to squash due to being empty " | 385 tid); 386 387 squashIt[tid] = instList[tid].end(); 388 389 doneSquashing[tid] = true; 390 } 391 392 if (robTailUpdate) { --- 83 unchanged lines hidden (view full) --- 476 477 478template <class Impl> 479void 480ROB<Impl>::squash(InstSeqNum squash_num, ThreadID tid) 481{ 482 if (isEmpty(tid)) { 483 DPRINTF(ROB, "Does not need to squash due to being empty " |
484 "[sn:%i]\n", | 484 "[sn:%llu]\n", |
485 squash_num); 486 487 return; 488 } 489 490 DPRINTF(ROB, "Starting to squash within the ROB.\n"); 491 492 robStatus[tid] = ROBSquashing; --- 67 unchanged lines hidden --- | 485 squash_num); 486 487 return; 488 } 489 490 DPRINTF(ROB, "Starting to squash within the ROB.\n"); 491 492 robStatus[tid] = ROBSquashing; --- 67 unchanged lines hidden --- |