1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Kevin Lim 29 * Korey Sewell 30 */ 31 32#ifndef __CPU_O3_ROB_HH__ 33#define __CPU_O3_ROB_HH__ 34 35#include <string> 36#include <utility> 37#include <vector> 38 39#include "arch/registers.hh" 40#include "base/types.hh" 41#include "config/the_isa.hh" 42 43/** 44 * ROB class. The ROB is largely what drives squashing. 45 */ 46template <class Impl> 47class ROB 48{ 49 protected: 50 typedef TheISA::RegIndex RegIndex; 51 public: 52 //Typedefs from the Impl. 53 typedef typename Impl::O3CPU O3CPU; 54 typedef typename Impl::DynInstPtr DynInstPtr; 55 56 typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo; 57 typedef typename std::list<DynInstPtr>::iterator InstIt; 58 59 /** Possible ROB statuses. */ 60 enum Status { 61 Running, 62 Idle, 63 ROBSquashing 64 }; 65 66 /** SMT ROB Sharing Policy */ 67 enum ROBPolicy{ 68 Dynamic, 69 Partitioned, 70 Threshold 71 }; 72 73 private: 74 /** Per-thread ROB status. */ 75 Status robStatus[Impl::MaxThreads]; 76 77 /** ROB resource sharing policy for SMT mode. */ 78 ROBPolicy robPolicy; 79 80 public: 81 /** ROB constructor. 82 * @param _numEntries Number of entries in ROB. 83 * @param _squashWidth Number of instructions that can be squashed in a 84 * single cycle. 85 * @param _smtROBPolicy ROB Partitioning Scheme for SMT. 86 * @param _smtROBThreshold Max Resources(by %) a thread can have in the ROB. 87 * @param _numThreads The number of active threads. 88 */ 89 ROB(O3CPU *_cpu, unsigned _numEntries, unsigned _squashWidth, 90 std::string smtROBPolicy, unsigned _smtROBThreshold, 91 ThreadID _numThreads); 92 93 std::string name() const; 94 95 /** Sets pointer to the list of active threads. 96 * @param at_ptr Pointer to the list of active threads. 97 */ 98 void setActiveThreads(std::list<ThreadID> *at_ptr); 99 100 /** Switches out the ROB. */ 101 void switchOut(); 102 103 /** Takes over another CPU's thread. */ 104 void takeOverFrom(); 105 106 /** Function to insert an instruction into the ROB. Note that whatever 107 * calls this function must ensure that there is enough space within the 108 * ROB for the new instruction. 109 * @param inst The instruction being inserted into the ROB. 110 */ 111 void insertInst(DynInstPtr &inst); 112 113 /** Returns pointer to the head instruction within the ROB. There is 114 * no guarantee as to the return value if the ROB is empty. 115 * @retval Pointer to the DynInst that is at the head of the ROB. 116 */ 117// DynInstPtr readHeadInst(); 118 119 /** Returns a pointer to the head instruction of a specific thread within 120 * the ROB. 121 * @return Pointer to the DynInst that is at the head of the ROB. 122 */ 123 DynInstPtr readHeadInst(ThreadID tid); 124
| 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Kevin Lim 29 * Korey Sewell 30 */ 31 32#ifndef __CPU_O3_ROB_HH__ 33#define __CPU_O3_ROB_HH__ 34 35#include <string> 36#include <utility> 37#include <vector> 38 39#include "arch/registers.hh" 40#include "base/types.hh" 41#include "config/the_isa.hh" 42 43/** 44 * ROB class. The ROB is largely what drives squashing. 45 */ 46template <class Impl> 47class ROB 48{ 49 protected: 50 typedef TheISA::RegIndex RegIndex; 51 public: 52 //Typedefs from the Impl. 53 typedef typename Impl::O3CPU O3CPU; 54 typedef typename Impl::DynInstPtr DynInstPtr; 55 56 typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo; 57 typedef typename std::list<DynInstPtr>::iterator InstIt; 58 59 /** Possible ROB statuses. */ 60 enum Status { 61 Running, 62 Idle, 63 ROBSquashing 64 }; 65 66 /** SMT ROB Sharing Policy */ 67 enum ROBPolicy{ 68 Dynamic, 69 Partitioned, 70 Threshold 71 }; 72 73 private: 74 /** Per-thread ROB status. */ 75 Status robStatus[Impl::MaxThreads]; 76 77 /** ROB resource sharing policy for SMT mode. */ 78 ROBPolicy robPolicy; 79 80 public: 81 /** ROB constructor. 82 * @param _numEntries Number of entries in ROB. 83 * @param _squashWidth Number of instructions that can be squashed in a 84 * single cycle. 85 * @param _smtROBPolicy ROB Partitioning Scheme for SMT. 86 * @param _smtROBThreshold Max Resources(by %) a thread can have in the ROB. 87 * @param _numThreads The number of active threads. 88 */ 89 ROB(O3CPU *_cpu, unsigned _numEntries, unsigned _squashWidth, 90 std::string smtROBPolicy, unsigned _smtROBThreshold, 91 ThreadID _numThreads); 92 93 std::string name() const; 94 95 /** Sets pointer to the list of active threads. 96 * @param at_ptr Pointer to the list of active threads. 97 */ 98 void setActiveThreads(std::list<ThreadID> *at_ptr); 99 100 /** Switches out the ROB. */ 101 void switchOut(); 102 103 /** Takes over another CPU's thread. */ 104 void takeOverFrom(); 105 106 /** Function to insert an instruction into the ROB. Note that whatever 107 * calls this function must ensure that there is enough space within the 108 * ROB for the new instruction. 109 * @param inst The instruction being inserted into the ROB. 110 */ 111 void insertInst(DynInstPtr &inst); 112 113 /** Returns pointer to the head instruction within the ROB. There is 114 * no guarantee as to the return value if the ROB is empty. 115 * @retval Pointer to the DynInst that is at the head of the ROB. 116 */ 117// DynInstPtr readHeadInst(); 118 119 /** Returns a pointer to the head instruction of a specific thread within 120 * the ROB. 121 * @return Pointer to the DynInst that is at the head of the ROB. 122 */ 123 DynInstPtr readHeadInst(ThreadID tid); 124
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125 /** Returns pointer to the tail instruction within the ROB. There is 126 * no guarantee as to the return value if the ROB is empty. 127 * @retval Pointer to the DynInst that is at the tail of the ROB. 128 */ 129// DynInstPtr readTailInst(); 130 131 /** Returns a pointer to the tail instruction of a specific thread within 132 * the ROB. 133 * @return Pointer to the DynInst that is at the tail of the ROB. 134 */ 135 DynInstPtr readTailInst(ThreadID tid); 136 137 /** Retires the head instruction, removing it from the ROB. */ 138// void retireHead(); 139 140 /** Retires the head instruction of a specific thread, removing it from the 141 * ROB. 142 */ 143 void retireHead(ThreadID tid); 144 145 /** Is the oldest instruction across all threads ready. */ 146// bool isHeadReady(); 147 148 /** Is the oldest instruction across a particular thread ready. */ 149 bool isHeadReady(ThreadID tid); 150 151 /** Is there any commitable head instruction across all threads ready. */ 152 bool canCommit(); 153 154 /** Re-adjust ROB partitioning. */ 155 void resetEntries(); 156 157 /** Number of entries needed For 'num_threads' amount of threads. */ 158 int entryAmount(ThreadID num_threads); 159 160 /** Returns the number of total free entries in the ROB. */ 161 unsigned numFreeEntries(); 162 163 /** Returns the number of free entries in a specific ROB paritition. */ 164 unsigned numFreeEntries(ThreadID tid); 165 166 /** Returns the maximum number of entries for a specific thread. */ 167 unsigned getMaxEntries(ThreadID tid) 168 { return maxEntries[tid]; } 169 170 /** Returns the number of entries being used by a specific thread. */ 171 unsigned getThreadEntries(ThreadID tid) 172 { return threadEntries[tid]; } 173 174 /** Returns if the ROB is full. */ 175 bool isFull() 176 { return numInstsInROB == numEntries; } 177 178 /** Returns if a specific thread's partition is full. */ 179 bool isFull(ThreadID tid) 180 { return threadEntries[tid] == numEntries; } 181 182 /** Returns if the ROB is empty. */ 183 bool isEmpty() 184 { return numInstsInROB == 0; } 185 186 /** Returns if a specific thread's partition is empty. */ 187 bool isEmpty(ThreadID tid) 188 { return threadEntries[tid] == 0; } 189 190 /** Executes the squash, marking squashed instructions. */ 191 void doSquash(ThreadID tid); 192 193 /** Squashes all instructions younger than the given sequence number for 194 * the specific thread. 195 */ 196 void squash(InstSeqNum squash_num, ThreadID tid); 197 198 /** Updates the head instruction with the new oldest instruction. */ 199 void updateHead(); 200 201 /** Updates the tail instruction with the new youngest instruction. */ 202 void updateTail(); 203 204 /** Reads the PC of the oldest head instruction. */ 205// uint64_t readHeadPC(); 206 207 /** Reads the PC of the head instruction of a specific thread. */ 208// uint64_t readHeadPC(ThreadID tid); 209 210 /** Reads the next PC of the oldest head instruction. */ 211// uint64_t readHeadNextPC(); 212 213 /** Reads the next PC of the head instruction of a specific thread. */ 214// uint64_t readHeadNextPC(ThreadID tid); 215 216 /** Reads the sequence number of the oldest head instruction. */ 217// InstSeqNum readHeadSeqNum(); 218 219 /** Reads the sequence number of the head instruction of a specific thread. 220 */ 221// InstSeqNum readHeadSeqNum(ThreadID tid); 222 223 /** Reads the PC of the youngest tail instruction. */ 224// uint64_t readTailPC(); 225 226 /** Reads the PC of the tail instruction of a specific thread. */ 227// uint64_t readTailPC(ThreadID tid); 228 229 /** Reads the sequence number of the youngest tail instruction. */ 230// InstSeqNum readTailSeqNum(); 231 232 /** Reads the sequence number of tail instruction of a specific thread. */ 233// InstSeqNum readTailSeqNum(ThreadID tid); 234 235 /** Checks if the ROB is still in the process of squashing instructions. 236 * @retval Whether or not the ROB is done squashing. 237 */ 238 bool isDoneSquashing(ThreadID tid) const 239 { return doneSquashing[tid]; } 240 241 /** Checks if the ROB is still in the process of squashing instructions for 242 * any thread. 243 */ 244 bool isDoneSquashing(); 245 246 /** This is more of a debugging function than anything. Use 247 * numInstsInROB to get the instructions in the ROB unless you are 248 * double checking that variable. 249 */ 250 int countInsts(); 251 252 /** This is more of a debugging function than anything. Use 253 * threadEntries to get the instructions in the ROB unless you are 254 * double checking that variable. 255 */ 256 int countInsts(ThreadID tid); 257 258 /** Registers statistics. */ 259 void regStats(); 260 261 private: 262 /** Pointer to the CPU. */ 263 O3CPU *cpu; 264 265 /** Active Threads in CPU */ 266 std::list<ThreadID> *activeThreads; 267 268 /** Number of instructions in the ROB. */ 269 unsigned numEntries; 270 271 /** Entries Per Thread */ 272 unsigned threadEntries[Impl::MaxThreads]; 273 274 /** Max Insts a Thread Can Have in the ROB */ 275 unsigned maxEntries[Impl::MaxThreads]; 276 277 /** ROB List of Instructions */ 278 std::list<DynInstPtr> instList[Impl::MaxThreads]; 279 280 /** Number of instructions that can be squashed in a single cycle. */ 281 unsigned squashWidth; 282 283 public: 284 /** Iterator pointing to the instruction which is the last instruction 285 * in the ROB. This may at times be invalid (ie when the ROB is empty), 286 * however it should never be incorrect. 287 */ 288 InstIt tail; 289 290 /** Iterator pointing to the instruction which is the first instruction in 291 * in the ROB*/ 292 InstIt head; 293 294 private: 295 /** Iterator used for walking through the list of instructions when 296 * squashing. Used so that there is persistent state between cycles; 297 * when squashing, the instructions are marked as squashed but not 298 * immediately removed, meaning the tail iterator remains the same before 299 * and after a squash. 300 * This will always be set to cpu->instList.end() if it is invalid. 301 */ 302 InstIt squashIt[Impl::MaxThreads]; 303 304 public: 305 /** Number of instructions in the ROB. */ 306 int numInstsInROB; 307 308 /** Dummy instruction returned if there are no insts left. */ 309 DynInstPtr dummyInst; 310 311 private: 312 /** The sequence number of the squashed instruction. */ 313 InstSeqNum squashedSeqNum[Impl::MaxThreads]; 314 315 /** Is the ROB done squashing. */ 316 bool doneSquashing[Impl::MaxThreads]; 317 318 /** Number of active threads. */ 319 ThreadID numThreads; 320 321 // The number of rob_reads 322 Stats::Scalar robReads; 323 // The number of rob_writes 324 Stats::Scalar robWrites; 325}; 326 327#endif //__CPU_O3_ROB_HH__
| 130 /** Returns pointer to the tail instruction within the ROB. There is 131 * no guarantee as to the return value if the ROB is empty. 132 * @retval Pointer to the DynInst that is at the tail of the ROB. 133 */ 134// DynInstPtr readTailInst(); 135 136 /** Returns a pointer to the tail instruction of a specific thread within 137 * the ROB. 138 * @return Pointer to the DynInst that is at the tail of the ROB. 139 */ 140 DynInstPtr readTailInst(ThreadID tid); 141 142 /** Retires the head instruction, removing it from the ROB. */ 143// void retireHead(); 144 145 /** Retires the head instruction of a specific thread, removing it from the 146 * ROB. 147 */ 148 void retireHead(ThreadID tid); 149 150 /** Is the oldest instruction across all threads ready. */ 151// bool isHeadReady(); 152 153 /** Is the oldest instruction across a particular thread ready. */ 154 bool isHeadReady(ThreadID tid); 155 156 /** Is there any commitable head instruction across all threads ready. */ 157 bool canCommit(); 158 159 /** Re-adjust ROB partitioning. */ 160 void resetEntries(); 161 162 /** Number of entries needed For 'num_threads' amount of threads. */ 163 int entryAmount(ThreadID num_threads); 164 165 /** Returns the number of total free entries in the ROB. */ 166 unsigned numFreeEntries(); 167 168 /** Returns the number of free entries in a specific ROB paritition. */ 169 unsigned numFreeEntries(ThreadID tid); 170 171 /** Returns the maximum number of entries for a specific thread. */ 172 unsigned getMaxEntries(ThreadID tid) 173 { return maxEntries[tid]; } 174 175 /** Returns the number of entries being used by a specific thread. */ 176 unsigned getThreadEntries(ThreadID tid) 177 { return threadEntries[tid]; } 178 179 /** Returns if the ROB is full. */ 180 bool isFull() 181 { return numInstsInROB == numEntries; } 182 183 /** Returns if a specific thread's partition is full. */ 184 bool isFull(ThreadID tid) 185 { return threadEntries[tid] == numEntries; } 186 187 /** Returns if the ROB is empty. */ 188 bool isEmpty() 189 { return numInstsInROB == 0; } 190 191 /** Returns if a specific thread's partition is empty. */ 192 bool isEmpty(ThreadID tid) 193 { return threadEntries[tid] == 0; } 194 195 /** Executes the squash, marking squashed instructions. */ 196 void doSquash(ThreadID tid); 197 198 /** Squashes all instructions younger than the given sequence number for 199 * the specific thread. 200 */ 201 void squash(InstSeqNum squash_num, ThreadID tid); 202 203 /** Updates the head instruction with the new oldest instruction. */ 204 void updateHead(); 205 206 /** Updates the tail instruction with the new youngest instruction. */ 207 void updateTail(); 208 209 /** Reads the PC of the oldest head instruction. */ 210// uint64_t readHeadPC(); 211 212 /** Reads the PC of the head instruction of a specific thread. */ 213// uint64_t readHeadPC(ThreadID tid); 214 215 /** Reads the next PC of the oldest head instruction. */ 216// uint64_t readHeadNextPC(); 217 218 /** Reads the next PC of the head instruction of a specific thread. */ 219// uint64_t readHeadNextPC(ThreadID tid); 220 221 /** Reads the sequence number of the oldest head instruction. */ 222// InstSeqNum readHeadSeqNum(); 223 224 /** Reads the sequence number of the head instruction of a specific thread. 225 */ 226// InstSeqNum readHeadSeqNum(ThreadID tid); 227 228 /** Reads the PC of the youngest tail instruction. */ 229// uint64_t readTailPC(); 230 231 /** Reads the PC of the tail instruction of a specific thread. */ 232// uint64_t readTailPC(ThreadID tid); 233 234 /** Reads the sequence number of the youngest tail instruction. */ 235// InstSeqNum readTailSeqNum(); 236 237 /** Reads the sequence number of tail instruction of a specific thread. */ 238// InstSeqNum readTailSeqNum(ThreadID tid); 239 240 /** Checks if the ROB is still in the process of squashing instructions. 241 * @retval Whether or not the ROB is done squashing. 242 */ 243 bool isDoneSquashing(ThreadID tid) const 244 { return doneSquashing[tid]; } 245 246 /** Checks if the ROB is still in the process of squashing instructions for 247 * any thread. 248 */ 249 bool isDoneSquashing(); 250 251 /** This is more of a debugging function than anything. Use 252 * numInstsInROB to get the instructions in the ROB unless you are 253 * double checking that variable. 254 */ 255 int countInsts(); 256 257 /** This is more of a debugging function than anything. Use 258 * threadEntries to get the instructions in the ROB unless you are 259 * double checking that variable. 260 */ 261 int countInsts(ThreadID tid); 262 263 /** Registers statistics. */ 264 void regStats(); 265 266 private: 267 /** Pointer to the CPU. */ 268 O3CPU *cpu; 269 270 /** Active Threads in CPU */ 271 std::list<ThreadID> *activeThreads; 272 273 /** Number of instructions in the ROB. */ 274 unsigned numEntries; 275 276 /** Entries Per Thread */ 277 unsigned threadEntries[Impl::MaxThreads]; 278 279 /** Max Insts a Thread Can Have in the ROB */ 280 unsigned maxEntries[Impl::MaxThreads]; 281 282 /** ROB List of Instructions */ 283 std::list<DynInstPtr> instList[Impl::MaxThreads]; 284 285 /** Number of instructions that can be squashed in a single cycle. */ 286 unsigned squashWidth; 287 288 public: 289 /** Iterator pointing to the instruction which is the last instruction 290 * in the ROB. This may at times be invalid (ie when the ROB is empty), 291 * however it should never be incorrect. 292 */ 293 InstIt tail; 294 295 /** Iterator pointing to the instruction which is the first instruction in 296 * in the ROB*/ 297 InstIt head; 298 299 private: 300 /** Iterator used for walking through the list of instructions when 301 * squashing. Used so that there is persistent state between cycles; 302 * when squashing, the instructions are marked as squashed but not 303 * immediately removed, meaning the tail iterator remains the same before 304 * and after a squash. 305 * This will always be set to cpu->instList.end() if it is invalid. 306 */ 307 InstIt squashIt[Impl::MaxThreads]; 308 309 public: 310 /** Number of instructions in the ROB. */ 311 int numInstsInROB; 312 313 /** Dummy instruction returned if there are no insts left. */ 314 DynInstPtr dummyInst; 315 316 private: 317 /** The sequence number of the squashed instruction. */ 318 InstSeqNum squashedSeqNum[Impl::MaxThreads]; 319 320 /** Is the ROB done squashing. */ 321 bool doneSquashing[Impl::MaxThreads]; 322 323 /** Number of active threads. */ 324 ThreadID numThreads; 325 326 // The number of rob_reads 327 Stats::Scalar robReads; 328 // The number of rob_writes 329 Stats::Scalar robWrites; 330}; 331 332#endif //__CPU_O3_ROB_HH__
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