rename_map.hh (10935:acd48ddd725f) rename_map.hh (12104:edd63f9c6184)
1/*
2 * Copyright (c) 2015 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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63 * Register rename map for a single class of registers (e.g., integer
64 * or floating point). Because the register class is implicitly
65 * determined by the rename map instance being accessed, all
66 * architectural register index parameters and values in this class
67 * are relative (e.g., %fp2 is just index 2).
68 */
69class SimpleRenameMap
70{
1/*
2 * Copyright (c) 2015 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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63 * Register rename map for a single class of registers (e.g., integer
64 * or floating point). Because the register class is implicitly
65 * determined by the rename map instance being accessed, all
66 * architectural register index parameters and values in this class
67 * are relative (e.g., %fp2 is just index 2).
68 */
69class SimpleRenameMap
70{
71 public:
72
73 typedef TheISA::RegIndex RegIndex;
74
75 private:
76
77 /** The acutal arch-to-phys register map */
78 std::vector<PhysRegIndex> map;
79
80 /**
81 * Pointer to the free list from which new physical registers
82 * should be allocated in rename()

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147 /** Return the number of free entries on the associated free list. */
148 unsigned numFreeEntries() const { return freeList->numFreeRegs(); }
149};
150
151
152/**
153 * Unified register rename map for all classes of registers. Wraps a
154 * set of class-specific rename maps. Methods that do not specify a
71 private:
72
73 /** The acutal arch-to-phys register map */
74 std::vector<PhysRegIndex> map;
75
76 /**
77 * Pointer to the free list from which new physical registers
78 * should be allocated in rename()

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143 /** Return the number of free entries on the associated free list. */
144 unsigned numFreeEntries() const { return freeList->numFreeRegs(); }
145};
146
147
148/**
149 * Unified register rename map for all classes of registers. Wraps a
150 * set of class-specific rename maps. Methods that do not specify a
155 * register class (e.g., rename()) take unified register indices,
151 * register class (e.g., rename()) take register ids,
156 * while methods that do specify a register class (e.g., renameInt())
152 * while methods that do specify a register class (e.g., renameInt())
157 * take relative register indices. See http://gem5.org/Register_Indexing.
153 * take register indices.
158 */
159class UnifiedRenameMap
160{
161 private:
162
163 /** The integer register rename map */
164 SimpleRenameMap intMap;
165

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174 * proper class.
175 */
176 PhysRegFile *regFile;
177
178 /** The condition-code register rename map */
179 SimpleRenameMap ccMap;
180
181 public:
154 */
155class UnifiedRenameMap
156{
157 private:
158
159 /** The integer register rename map */
160 SimpleRenameMap intMap;
161

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170 * proper class.
171 */
172 PhysRegFile *regFile;
173
174 /** The condition-code register rename map */
175 SimpleRenameMap ccMap;
176
177 public:
182 typedef TheISA::RegIndex RegIndex;
183
184 typedef SimpleRenameMap::RenameInfo RenameInfo;
185
186 /** Default constructor. init() must be called prior to use. */
187 UnifiedRenameMap() : regFile(nullptr) {};
188
189 /** Destructor. */
190 ~UnifiedRenameMap() {};
191
192 /** Initializes rename map with given parameters. */
193 void init(PhysRegFile *_regFile,
194 RegIndex _intZeroReg,
195 RegIndex _floatZeroReg,
196 UnifiedFreeList *freeList);
197
198 /**
199 * Tell rename map to get a new free physical register to remap
178
179 typedef SimpleRenameMap::RenameInfo RenameInfo;
180
181 /** Default constructor. init() must be called prior to use. */
182 UnifiedRenameMap() : regFile(nullptr) {};
183
184 /** Destructor. */
185 ~UnifiedRenameMap() {};
186
187 /** Initializes rename map with given parameters. */
188 void init(PhysRegFile *_regFile,
189 RegIndex _intZeroReg,
190 RegIndex _floatZeroReg,
191 UnifiedFreeList *freeList);
192
193 /**
194 * Tell rename map to get a new free physical register to remap
200 * the specified architectural register. This version takes a
201 * unified flattened architectural register index and calls the
195 * the specified architectural register. This version takes a
196 * flattened architectural register id and calls the
202 * appropriate class-specific rename table.
197 * appropriate class-specific rename table.
203 * @param arch_reg The unified architectural register index to remap.
198 * @param arch_reg The architectural register index to remap.
204 * @return A RenameInfo pair indicating both the new and previous
205 * physical registers.
206 */
199 * @return A RenameInfo pair indicating both the new and previous
200 * physical registers.
201 */
207 RenameInfo rename(RegIndex arch_reg);
202 RenameInfo rename(RegId arch_reg);
208
209 /**
203
204 /**
210 * Perform rename() on an integer register, given a relative
205 * Perform rename() on an integer register, given a
211 * integer register index.
212 */
213 RenameInfo renameInt(RegIndex rel_arch_reg)
214 {
215 RenameInfo info = intMap.rename(rel_arch_reg);
216 assert(regFile->isIntPhysReg(info.first));
217 return info;
218 }
219
220 /**
206 * integer register index.
207 */
208 RenameInfo renameInt(RegIndex rel_arch_reg)
209 {
210 RenameInfo info = intMap.rename(rel_arch_reg);
211 assert(regFile->isIntPhysReg(info.first));
212 return info;
213 }
214
215 /**
221 * Perform rename() on a floating-point register, given a relative
216 * Perform rename() on a floating-point register, given a
222 * floating-point register index.
223 */
224 RenameInfo renameFloat(RegIndex rel_arch_reg)
225 {
226 RenameInfo info = floatMap.rename(rel_arch_reg);
227 assert(regFile->isFloatPhysReg(info.first));
228 return info;
229 }
230
231 /**
217 * floating-point register index.
218 */
219 RenameInfo renameFloat(RegIndex rel_arch_reg)
220 {
221 RenameInfo info = floatMap.rename(rel_arch_reg);
222 assert(regFile->isFloatPhysReg(info.first));
223 return info;
224 }
225
226 /**
232 * Perform rename() on a condition-code register, given a relative
227 * Perform rename() on a condition-code register, given a
233 * condition-code register index.
234 */
235 RenameInfo renameCC(RegIndex rel_arch_reg)
236 {
237 RenameInfo info = ccMap.rename(rel_arch_reg);
238 assert(regFile->isCCPhysReg(info.first));
239 return info;
240 }
241
242 /**
228 * condition-code register index.
229 */
230 RenameInfo renameCC(RegIndex rel_arch_reg)
231 {
232 RenameInfo info = ccMap.rename(rel_arch_reg);
233 assert(regFile->isCCPhysReg(info.first));
234 return info;
235 }
236
237 /**
243 * Perform rename() on a misc register, given a relative
238 * Perform rename() on a misc register, given a
244 * misc register index.
245 */
246 RenameInfo renameMisc(RegIndex rel_arch_reg)
247 {
248 // misc regs aren't really renamed, just remapped
249 PhysRegIndex phys_reg = lookupMisc(rel_arch_reg);
250 // Set the previous register to the same register; mainly it must be
251 // known that the prev reg was outside the range of normal registers
252 // so the free list can avoid adding it.
253 return RenameInfo(phys_reg, phys_reg);
254 }
255
256
257 /**
258 * Look up the physical register mapped to an architectural register.
239 * misc register index.
240 */
241 RenameInfo renameMisc(RegIndex rel_arch_reg)
242 {
243 // misc regs aren't really renamed, just remapped
244 PhysRegIndex phys_reg = lookupMisc(rel_arch_reg);
245 // Set the previous register to the same register; mainly it must be
246 // known that the prev reg was outside the range of normal registers
247 // so the free list can avoid adding it.
248 return RenameInfo(phys_reg, phys_reg);
249 }
250
251
252 /**
253 * Look up the physical register mapped to an architectural register.
259 * This version takes a unified flattened architectural register index
254 * This version takes a flattened architectural register id
260 * and calls the appropriate class-specific rename table.
255 * and calls the appropriate class-specific rename table.
261 * @param arch_reg The unified architectural register to look up.
256 * @param arch_reg The architectural register to look up.
262 * @return The physical register it is currently mapped to.
263 */
257 * @return The physical register it is currently mapped to.
258 */
264 PhysRegIndex lookup(RegIndex arch_reg) const;
259 PhysRegIndex lookup(RegId arch_reg) const;
265
266 /**
260
261 /**
267 * Perform lookup() on an integer register, given a relative
262 * Perform lookup() on an integer register, given a
268 * integer register index.
269 */
270 PhysRegIndex lookupInt(RegIndex rel_arch_reg) const
271 {
272 PhysRegIndex phys_reg = intMap.lookup(rel_arch_reg);
273 assert(regFile->isIntPhysReg(phys_reg));
274 return phys_reg;
275 }
276
277 /**
263 * integer register index.
264 */
265 PhysRegIndex lookupInt(RegIndex rel_arch_reg) const
266 {
267 PhysRegIndex phys_reg = intMap.lookup(rel_arch_reg);
268 assert(regFile->isIntPhysReg(phys_reg));
269 return phys_reg;
270 }
271
272 /**
278 * Perform lookup() on a floating-point register, given a relative
273 * Perform lookup() on a floating-point register, given a
279 * floating-point register index.
280 */
281 PhysRegIndex lookupFloat(RegIndex rel_arch_reg) const
282 {
283 PhysRegIndex phys_reg = floatMap.lookup(rel_arch_reg);
284 assert(regFile->isFloatPhysReg(phys_reg));
285 return phys_reg;
286 }
287
288 /**
274 * floating-point register index.
275 */
276 PhysRegIndex lookupFloat(RegIndex rel_arch_reg) const
277 {
278 PhysRegIndex phys_reg = floatMap.lookup(rel_arch_reg);
279 assert(regFile->isFloatPhysReg(phys_reg));
280 return phys_reg;
281 }
282
283 /**
289 * Perform lookup() on a condition-code register, given a relative
284 * Perform lookup() on a condition-code register, given a
290 * condition-code register index.
291 */
292 PhysRegIndex lookupCC(RegIndex rel_arch_reg) const
293 {
294 PhysRegIndex phys_reg = ccMap.lookup(rel_arch_reg);
295 assert(regFile->isCCPhysReg(phys_reg));
296 return phys_reg;
297 }

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306 // beyond the range of actual physical registers
307 PhysRegIndex phys_reg = rel_arch_reg + regFile->totalNumPhysRegs();
308 return phys_reg;
309 }
310
311 /**
312 * Update rename map with a specific mapping. Generally used to
313 * roll back to old mappings on a squash. This version takes a
285 * condition-code register index.
286 */
287 PhysRegIndex lookupCC(RegIndex rel_arch_reg) const
288 {
289 PhysRegIndex phys_reg = ccMap.lookup(rel_arch_reg);
290 assert(regFile->isCCPhysReg(phys_reg));
291 return phys_reg;
292 }

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301 // beyond the range of actual physical registers
302 PhysRegIndex phys_reg = rel_arch_reg + regFile->totalNumPhysRegs();
303 return phys_reg;
304 }
305
306 /**
307 * Update rename map with a specific mapping. Generally used to
308 * roll back to old mappings on a squash. This version takes a
314 * unified flattened architectural register index and calls the
309 * flattened architectural register id and calls the
315 * appropriate class-specific rename table.
310 * appropriate class-specific rename table.
316 * @param arch_reg The unified architectural register to remap.
311 * @param arch_reg The architectural register to remap.
317 * @param phys_reg The physical register to remap it to.
318 */
312 * @param phys_reg The physical register to remap it to.
313 */
319 void setEntry(RegIndex arch_reg, PhysRegIndex phys_reg);
314 void setEntry(RegId arch_reg, PhysRegIndex phys_reg);
320
321 /**
315
316 /**
322 * Perform setEntry() on an integer register, given a relative
317 * Perform setEntry() on an integer register, given a
323 * integer register index.
324 */
325 void setIntEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
326 {
327 assert(regFile->isIntPhysReg(phys_reg));
328 intMap.setEntry(arch_reg, phys_reg);
329 }
330
331 /**
318 * integer register index.
319 */
320 void setIntEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
321 {
322 assert(regFile->isIntPhysReg(phys_reg));
323 intMap.setEntry(arch_reg, phys_reg);
324 }
325
326 /**
332 * Perform setEntry() on a floating-point register, given a relative
327 * Perform setEntry() on a floating-point register, given a
333 * floating-point register index.
334 */
335 void setFloatEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
336 {
337 assert(regFile->isFloatPhysReg(phys_reg));
338 floatMap.setEntry(arch_reg, phys_reg);
339 }
340
341 /**
328 * floating-point register index.
329 */
330 void setFloatEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
331 {
332 assert(regFile->isFloatPhysReg(phys_reg));
333 floatMap.setEntry(arch_reg, phys_reg);
334 }
335
336 /**
342 * Perform setEntry() on a condition-code register, given a relative
337 * Perform setEntry() on a condition-code register, given a
343 * condition-code register index.
344 */
345 void setCCEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
346 {
347 assert(regFile->isCCPhysReg(phys_reg));
348 ccMap.setEntry(arch_reg, phys_reg);
349 }
350

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339 */
340 void setCCEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
341 {
342 assert(regFile->isCCPhysReg(phys_reg));
343 ccMap.setEntry(arch_reg, phys_reg);
344 }
345

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