1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29// Todo: Create destructor.
30// Have it so that there's a more meaningful name given to the variable
31// that marks the beginning of the FP registers.
32
33#ifndef __CPU_O3_RENAME_MAP_HH__
34#define __CPU_O3_RENAME_MAP_HH__
35
36#include <iostream>
37#include <utility>
38#include <vector>
39
40#include "cpu/o3/free_list.hh"
41//For RegIndex
42#include "arch/isa_traits.hh"
43
44class SimpleRenameMap
45{
46 protected:
47 typedef TheISA::RegIndex RegIndex;
48 public:
49 /**
50 * Pair of a logical register and a physical register. Tells the
51 * previous mapping of a logical register to a physical register.
52 * Used to roll back the rename map to a previous state.
53 */
54 typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo;
55
56 /**
57 * Pair of a physical register and a physical register. Used to
58 * return the physical register that a logical register has been
59 * renamed to, and the previous physical register that the same
60 * logical register was previously mapped to.
61 */
62 typedef std::pair<PhysRegIndex, PhysRegIndex> RenameInfo;
63
64 public:
65 //Constructor
66 SimpleRenameMap() {};
67
68 /** Destructor. */
69 ~SimpleRenameMap();
70
71 void init(unsigned _numLogicalIntRegs,
72 unsigned _numPhysicalIntRegs,
73 PhysRegIndex &_int_reg_start,
74
75 unsigned _numLogicalFloatRegs,
76 unsigned _numPhysicalFloatRegs,
77 PhysRegIndex &_float_reg_start,
78
79 unsigned _numMiscRegs,
80
81 RegIndex _intZeroReg,
82 RegIndex _floatZeroReg,
83
84 int id,
85 bool bindRegs);
86
87 void setFreeList(SimpleFreeList *fl_ptr);
88
89 //Tell rename map to get a free physical register for a given
90 //architected register. Not sure it should have a return value,
91 //but perhaps it should have some sort of fault in case there are
92 //no free registers.
93 RenameInfo rename(RegIndex arch_reg);
94
95 PhysRegIndex lookup(RegIndex phys_reg);
96
97 /**
98 * Marks the given register as ready, meaning that its value has been
99 * calculated and written to the register file.
100 * @param ready_reg The index of the physical register that is now ready.
101 */
102 void setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg);
103
104 int numFreeEntries();
105
106 private:
107 /** Rename Map ID */
108 int id;
109
110 /** Number of logical integer registers. */
111 int numLogicalIntRegs;
112
113 /** Number of physical integer registers. */
114 int numPhysicalIntRegs;
115
116 /** Number of logical floating point registers. */
117 int numLogicalFloatRegs;
118
119 /** Number of physical floating point registers. */
120 int numPhysicalFloatRegs;
121
122 /** Number of miscellaneous registers. */
123 int numMiscRegs;
124
125 /** Number of logical integer + float registers. */
126 int numLogicalRegs;
127
128 /** Number of physical integer + float registers. */
129 int numPhysicalRegs;
130
131 /** The integer zero register. This implementation assumes it is always
132 * zero and never can be anything else.
133 */
134 RegIndex intZeroReg;
135
136 /** The floating point zero register. This implementation assumes it is
137 * always zero and never can be anything else.
138 */
139 RegIndex floatZeroReg;
140
141 class RenameEntry
142 {
143 public:
144 PhysRegIndex physical_reg;
145 bool valid;
146
147 RenameEntry()
148 : physical_reg(0), valid(false)
149 { }
150 };
151
152 //Change this to private
153 private:
154 /** Integer rename map. */
155 std::vector<RenameEntry> intRenameMap;
156
157 /** Floating point rename map. */
158 std::vector<RenameEntry> floatRenameMap;
159
160 private:
161 /** Free list interface. */
162 SimpleFreeList *freeList;
163};
164
165#endif //__CPU_O3_RENAME_MAP_HH__