rename_map.cc (2665:a124942bacb8) rename_map.cc (2670:9107b8bd08cd)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 20 unchanged lines hidden (view full) ---

29 */
30
31#include <vector>
32
33#include "cpu/o3/rename_map.hh"
34
35using namespace std;
36
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 20 unchanged lines hidden (view full) ---

29 */
30
31#include <vector>
32
33#include "cpu/o3/rename_map.hh"
34
35using namespace std;
36
37// Todo: Consider making functions inline. Avoid having things that are
38// using the zero register or misc registers from adding on the registers
39// to the free list. Possibly remove the direct communication between
40// this and the freelist. Considering making inline bool functions that
41// determine if the register is a logical int, logical fp, physical int,
42// physical fp, etc.
37// @todo: Consider making inline bool functions that determine if the
38// register is a logical int, logical fp, physical int, physical fp,
39// etc.
43
40
44SimpleRenameMap::SimpleRenameMap(unsigned _numLogicalIntRegs,
45 unsigned _numPhysicalIntRegs,
46 unsigned _numLogicalFloatRegs,
47 unsigned _numPhysicalFloatRegs,
48 unsigned _numMiscRegs,
49 RegIndex _intZeroReg,
50 RegIndex _floatZeroReg)
51 : numLogicalIntRegs(_numLogicalIntRegs),
52 numPhysicalIntRegs(_numPhysicalIntRegs),
53 numLogicalFloatRegs(_numLogicalFloatRegs),
54 numPhysicalFloatRegs(_numPhysicalFloatRegs),
55 numMiscRegs(_numMiscRegs),
56 intZeroReg(_intZeroReg),
57 floatZeroReg(_floatZeroReg)
41SimpleRenameMap::~SimpleRenameMap()
58{
42{
59 DPRINTF(Rename, "Rename: Creating rename map. Phys: %i / %i, Float: "
60 "%i / %i.\n", numLogicalIntRegs, numPhysicalIntRegs,
43}
44
45void
46SimpleRenameMap::init(unsigned _numLogicalIntRegs,
47 unsigned _numPhysicalIntRegs,
48 PhysRegIndex &ireg_idx,
49
50 unsigned _numLogicalFloatRegs,
51 unsigned _numPhysicalFloatRegs,
52 PhysRegIndex &freg_idx,
53
54 unsigned _numMiscRegs,
55
56 RegIndex _intZeroReg,
57 RegIndex _floatZeroReg,
58
59 int map_id,
60 bool bindRegs)
61{
62 id = map_id;
63
64 numLogicalIntRegs = _numLogicalIntRegs;
65
66 numLogicalFloatRegs = _numLogicalFloatRegs;
67
68 numPhysicalIntRegs = _numPhysicalIntRegs;
69
70 numPhysicalFloatRegs = _numPhysicalFloatRegs;
71
72 numMiscRegs = _numMiscRegs;
73
74 intZeroReg = _intZeroReg;
75 floatZeroReg = _floatZeroReg;
76
77 DPRINTF(Rename, "Creating rename map %i. Phys: %i / %i, Float: "
78 "%i / %i.\n", id, numLogicalIntRegs, numPhysicalIntRegs,
61 numLogicalFloatRegs, numPhysicalFloatRegs);
62
63 numLogicalRegs = numLogicalIntRegs + numLogicalFloatRegs;
64
65 numPhysicalRegs = numPhysicalIntRegs + numPhysicalFloatRegs;
66
79 numLogicalFloatRegs, numPhysicalFloatRegs);
80
81 numLogicalRegs = numLogicalIntRegs + numLogicalFloatRegs;
82
83 numPhysicalRegs = numPhysicalIntRegs + numPhysicalFloatRegs;
84
67 //Create the rename maps, and their scoreboards.
68 intRenameMap = new RenameEntry[numLogicalIntRegs];
69 floatRenameMap = new RenameEntry[numLogicalRegs];
85 //Create the rename maps
86 intRenameMap.resize(numLogicalIntRegs);
87 floatRenameMap.resize(numLogicalRegs);
70
88
71 // Should combine this into one scoreboard.
72 intScoreboard.resize(numPhysicalIntRegs);
73 floatScoreboard.resize(numPhysicalRegs);
74 miscScoreboard.resize(numPhysicalRegs + numMiscRegs);
89 if (bindRegs) {
90 DPRINTF(Rename, "Binding registers into rename map %i",id);
75
91
76 // Initialize the entries in the integer rename map to point to the
77 // physical registers of the same index, and consider each register
78 // ready until the first rename occurs.
79 for (RegIndex index = 0; index < numLogicalIntRegs; ++index)
80 {
81 intRenameMap[index].physical_reg = index;
82 intScoreboard[index] = 1;
83 }
92 // Initialize the entries in the integer rename map to point to the
93 // physical registers of the same index
94 for (RegIndex index = 0; index < numLogicalIntRegs; ++index)
95 {
96 intRenameMap[index].physical_reg = ireg_idx++;
97 }
84
98
85 // Initialize the rest of the physical registers (the ones that don't
86 // directly map to a logical register) as unready.
87 for (PhysRegIndex index = numLogicalIntRegs;
88 index < numPhysicalIntRegs;
89 ++index)
90 {
91 intScoreboard[index] = 0;
92 }
99 // Initialize the entries in the floating point rename map to point to
100 // the physical registers of the same index
101 // Although the index refers purely to architected registers, because
102 // the floating reg indices come after the integer reg indices, they
103 // may exceed the size of a normal RegIndex (short).
104 for (PhysRegIndex index = numLogicalIntRegs;
105 index < numLogicalRegs; ++index)
106 {
107 floatRenameMap[index].physical_reg = freg_idx++;
108 }
109 } else {
110 DPRINTF(Rename, "Binding registers into rename map %i",id);
93
111
94 int float_reg_idx = numPhysicalIntRegs;
112 PhysRegIndex temp_ireg = ireg_idx;
95
113
96 // Initialize the entries in the floating point rename map to point to
97 // the physical registers of the same index, and consider each register
98 // ready until the first rename occurs.
99 // Although the index refers purely to architected registers, because
100 // the floating reg indices come after the integer reg indices, they
101 // may exceed the size of a normal RegIndex (short).
102 for (PhysRegIndex index = numLogicalIntRegs;
103 index < numLogicalRegs; ++index)
104 {
105 floatRenameMap[index].physical_reg = float_reg_idx++;
106 }
114 for (RegIndex index = 0; index < numLogicalIntRegs; ++index)
115 {
116 intRenameMap[index].physical_reg = temp_ireg++;
117 }
107
118
108 for (PhysRegIndex index = numPhysicalIntRegs;
109 index < numPhysicalIntRegs + numLogicalFloatRegs; ++index)
110 {
111 floatScoreboard[index] = 1;
112 }
119 PhysRegIndex temp_freg = freg_idx;
113
120
114 // Initialize the rest of the physical registers (the ones that don't
115 // directly map to a logical register) as unready.
116 for (PhysRegIndex index = numPhysicalIntRegs + numLogicalFloatRegs;
117 index < numPhysicalRegs;
118 ++index)
119 {
120 floatScoreboard[index] = 0;
121 for (PhysRegIndex index = numLogicalIntRegs;
122 index < numLogicalRegs; ++index)
123 {
124 floatRenameMap[index].physical_reg = temp_freg++;
125 }
121 }
126 }
122
123 // Initialize the entries in the misc register scoreboard to be ready.
124 for (PhysRegIndex index = numPhysicalRegs;
125 index < numPhysicalRegs + numMiscRegs; ++index)
126 {
127 miscScoreboard[index] = 1;
128 }
129}
130
127}
128
131SimpleRenameMap::~SimpleRenameMap()
132{
133 // Delete the rename maps as they were allocated with new.
134 delete [] intRenameMap;
135 delete [] floatRenameMap;
136}
137
138void
139SimpleRenameMap::setFreeList(SimpleFreeList *fl_ptr)
140{
129void
130SimpleRenameMap::setFreeList(SimpleFreeList *fl_ptr)
131{
141 //Setup the interface to the freelist.
142 freeList = fl_ptr;
143}
144
145
132 freeList = fl_ptr;
133}
134
135
146// Don't allow this stage to fault; force that check to the rename stage.
147// Simply ask to rename a logical register and get back a new physical
148// register index.
149SimpleRenameMap::RenameInfo
150SimpleRenameMap::rename(RegIndex arch_reg)
151{
152 PhysRegIndex renamed_reg;
153 PhysRegIndex prev_reg;
154
155 if (arch_reg < numLogicalIntRegs) {
156
157 // Record the current physical register that is renamed to the
158 // requested architected register.
159 prev_reg = intRenameMap[arch_reg].physical_reg;
160
136SimpleRenameMap::RenameInfo
137SimpleRenameMap::rename(RegIndex arch_reg)
138{
139 PhysRegIndex renamed_reg;
140 PhysRegIndex prev_reg;
141
142 if (arch_reg < numLogicalIntRegs) {
143
144 // Record the current physical register that is renamed to the
145 // requested architected register.
146 prev_reg = intRenameMap[arch_reg].physical_reg;
147
161 // If it's not referencing the zero register, then mark the register
162 // as not ready.
148 // If it's not referencing the zero register, then rename the
149 // register.
163 if (arch_reg != intZeroReg) {
150 if (arch_reg != intZeroReg) {
164 // Get a free physical register to rename to.
165 renamed_reg = freeList->getIntReg();
166
151 renamed_reg = freeList->getIntReg();
152
167 // Update the integer rename map.
168 intRenameMap[arch_reg].physical_reg = renamed_reg;
169
170 assert(renamed_reg >= 0 && renamed_reg < numPhysicalIntRegs);
171
153 intRenameMap[arch_reg].physical_reg = renamed_reg;
154
155 assert(renamed_reg >= 0 && renamed_reg < numPhysicalIntRegs);
156
172 // Mark register as not ready.
173 intScoreboard[renamed_reg] = false;
174 } else {
175 // Otherwise return the zero register so nothing bad happens.
176 renamed_reg = intZeroReg;
177 }
178 } else if (arch_reg < numLogicalRegs) {
157 } else {
158 // Otherwise return the zero register so nothing bad happens.
159 renamed_reg = intZeroReg;
160 }
161 } else if (arch_reg < numLogicalRegs) {
179 // Subtract off the base offset for floating point registers.
180// arch_reg = arch_reg - numLogicalIntRegs;
181
182 // Record the current physical register that is renamed to the
183 // requested architected register.
184 prev_reg = floatRenameMap[arch_reg].physical_reg;
185
162 // Record the current physical register that is renamed to the
163 // requested architected register.
164 prev_reg = floatRenameMap[arch_reg].physical_reg;
165
186 // If it's not referencing the zero register, then mark the register
187 // as not ready.
166 // If it's not referencing the zero register, then rename the
167 // register.
188 if (arch_reg != floatZeroReg) {
168 if (arch_reg != floatZeroReg) {
189 // Get a free floating point register to rename to.
190 renamed_reg = freeList->getFloatReg();
191
169 renamed_reg = freeList->getFloatReg();
170
192 // Update the floating point rename map.
193 floatRenameMap[arch_reg].physical_reg = renamed_reg;
194
195 assert(renamed_reg < numPhysicalRegs &&
196 renamed_reg >= numPhysicalIntRegs);
171 floatRenameMap[arch_reg].physical_reg = renamed_reg;
172
173 assert(renamed_reg < numPhysicalRegs &&
174 renamed_reg >= numPhysicalIntRegs);
197
198 // Mark register as not ready.
199 floatScoreboard[renamed_reg] = false;
200 } else {
201 // Otherwise return the zero register so nothing bad happens.
202 renamed_reg = floatZeroReg;
203 }
204 } else {
205 // Subtract off the base offset for miscellaneous registers.
206 arch_reg = arch_reg - numLogicalRegs;
207
175 } else {
176 // Otherwise return the zero register so nothing bad happens.
177 renamed_reg = floatZeroReg;
178 }
179 } else {
180 // Subtract off the base offset for miscellaneous registers.
181 arch_reg = arch_reg - numLogicalRegs;
182
208 // No renaming happens to the misc. registers. They are simply the
209 // registers that come after all the physical registers; thus
210 // take the base architected register and add the physical registers
211 // to it.
183 // No renaming happens to the misc. registers. They are
184 // simply the registers that come after all the physical
185 // registers; thus take the base architected register and add
186 // the physical registers to it.
212 renamed_reg = arch_reg + numPhysicalRegs;
213
214 // Set the previous register to the same register; mainly it must be
215 // known that the prev reg was outside the range of normal registers
216 // so the free list can avoid adding it.
217 prev_reg = renamed_reg;
218
219 assert(renamed_reg < numPhysicalRegs + numMiscRegs);
187 renamed_reg = arch_reg + numPhysicalRegs;
188
189 // Set the previous register to the same register; mainly it must be
190 // known that the prev reg was outside the range of normal registers
191 // so the free list can avoid adding it.
192 prev_reg = renamed_reg;
193
194 assert(renamed_reg < numPhysicalRegs + numMiscRegs);
220
221 miscScoreboard[renamed_reg] = false;
222 }
223
224 return RenameInfo(renamed_reg, prev_reg);
225}
226
195 }
196
197 return RenameInfo(renamed_reg, prev_reg);
198}
199
227//Perhaps give this a pair as a return value, of the physical register
228//and whether or not it's ready.
229PhysRegIndex
230SimpleRenameMap::lookup(RegIndex arch_reg)
231{
232 if (arch_reg < numLogicalIntRegs) {
233 return intRenameMap[arch_reg].physical_reg;
234 } else if (arch_reg < numLogicalRegs) {
200PhysRegIndex
201SimpleRenameMap::lookup(RegIndex arch_reg)
202{
203 if (arch_reg < numLogicalIntRegs) {
204 return intRenameMap[arch_reg].physical_reg;
205 } else if (arch_reg < numLogicalRegs) {
235 // Subtract off the base FP offset.
236// arch_reg = arch_reg - numLogicalIntRegs;
237
238 return floatRenameMap[arch_reg].physical_reg;
239 } else {
240 // Subtract off the misc registers offset.
241 arch_reg = arch_reg - numLogicalRegs;
242
243 // Misc. regs don't rename, so simply add the base arch reg to
244 // the number of physical registers.
245 return numPhysicalRegs + arch_reg;
246 }
247}
248
206 return floatRenameMap[arch_reg].physical_reg;
207 } else {
208 // Subtract off the misc registers offset.
209 arch_reg = arch_reg - numLogicalRegs;
210
211 // Misc. regs don't rename, so simply add the base arch reg to
212 // the number of physical registers.
213 return numPhysicalRegs + arch_reg;
214 }
215}
216
249bool
250SimpleRenameMap::isReady(PhysRegIndex phys_reg)
251{
252 if (phys_reg < numPhysicalIntRegs) {
253 return intScoreboard[phys_reg];
254 } else if (phys_reg < numPhysicalRegs) {
255
256 // Subtract off the base FP offset.
257// phys_reg = phys_reg - numPhysicalIntRegs;
258
259 return floatScoreboard[phys_reg];
260 } else {
261 // Subtract off the misc registers offset.
262// phys_reg = phys_reg - numPhysicalRegs;
263
264 return miscScoreboard[phys_reg];
265 }
266}
267
268// In this implementation the miscellaneous registers do not actually rename,
269// so this function does not allow you to try to change their mappings.
270void
271SimpleRenameMap::setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg)
272{
217void
218SimpleRenameMap::setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg)
219{
220 // In this implementation the miscellaneous registers do not
221 // actually rename, so this function does not allow you to try to
222 // change their mappings.
273 if (arch_reg < numLogicalIntRegs) {
274 DPRINTF(Rename, "Rename Map: Integer register %i being set to %i.\n",
275 (int)arch_reg, renamed_reg);
276
277 intRenameMap[arch_reg].physical_reg = renamed_reg;
223 if (arch_reg < numLogicalIntRegs) {
224 DPRINTF(Rename, "Rename Map: Integer register %i being set to %i.\n",
225 (int)arch_reg, renamed_reg);
226
227 intRenameMap[arch_reg].physical_reg = renamed_reg;
278 } else {
279 assert(arch_reg < (numLogicalIntRegs + numLogicalFloatRegs));
280
228 } else if (arch_reg < numLogicalIntRegs + numLogicalFloatRegs) {
281 DPRINTF(Rename, "Rename Map: Float register %i being set to %i.\n",
282 (int)arch_reg - numLogicalIntRegs, renamed_reg);
283
284 floatRenameMap[arch_reg].physical_reg = renamed_reg;
285 }
286}
287
229 DPRINTF(Rename, "Rename Map: Float register %i being set to %i.\n",
230 (int)arch_reg - numLogicalIntRegs, renamed_reg);
231
232 floatRenameMap[arch_reg].physical_reg = renamed_reg;
233 }
234}
235
288void
289SimpleRenameMap::squash(vector<RegIndex> freed_regs,
290 vector<UnmapInfo> unmaps)
291{
292 panic("Not sure this function should be called.");
293
294 // Not sure the rename map should be able to access the free list
295 // like this.
296 while (!freed_regs.empty()) {
297 RegIndex free_register = freed_regs.back();
298
299 if (free_register < numPhysicalIntRegs) {
300 freeList->addIntReg(free_register);
301 } else {
302 // Subtract off the base FP dependence tag.
303 free_register = free_register - numPhysicalIntRegs;
304 freeList->addFloatReg(free_register);
305 }
306
307 freed_regs.pop_back();
308 }
309
310 // Take unmap info and roll back the rename map.
311}
312
313void
314SimpleRenameMap::markAsReady(PhysRegIndex ready_reg)
315{
316 DPRINTF(Rename, "Rename map: Marking register %i as ready.\n",
317 (int)ready_reg);
318
319 if (ready_reg < numPhysicalIntRegs) {
320 assert(ready_reg >= 0);
321
322 intScoreboard[ready_reg] = 1;
323 } else if (ready_reg < numPhysicalRegs) {
324
325 // Subtract off the base FP offset.
326// ready_reg = ready_reg - numPhysicalIntRegs;
327
328 floatScoreboard[ready_reg] = 1;
329 } else {
330 //Subtract off the misc registers offset.
331// ready_reg = ready_reg - numPhysicalRegs;
332
333 miscScoreboard[ready_reg] = 1;
334 }
335}
336
337int
338SimpleRenameMap::numFreeEntries()
339{
340 int free_int_regs = freeList->numFreeIntRegs();
341 int free_float_regs = freeList->numFreeFloatRegs();
342
343 if (free_int_regs < free_float_regs) {
344 return free_int_regs;
345 } else {
346 return free_float_regs;
347 }
348}
236int
237SimpleRenameMap::numFreeEntries()
238{
239 int free_int_regs = freeList->numFreeIntRegs();
240 int free_float_regs = freeList->numFreeFloatRegs();
241
242 if (free_int_regs < free_float_regs) {
243 return free_int_regs;
244 } else {
245 return free_float_regs;
246 }
247}