1/* |
2 * Copyright (c) 2016-2017,2019 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 104 unchanged lines hidden (view full) --- 115 116 floatMap.init(TheISA::NumFloatRegs, &(freeList->floatList), _floatZeroReg); 117 118 vecMap.init(TheISA::NumVecRegs, &(freeList->vecList), (RegIndex)-1); 119 120 vecElemMap.init(TheISA::NumVecRegs * NVecElems, 121 &(freeList->vecElemList), (RegIndex)-1); 122 |
123 predMap.init(TheISA::NumVecPredRegs, &(freeList->predList), (RegIndex)-1); 124 |
125 ccMap.init(TheISA::NumCCRegs, &(freeList->ccList), (RegIndex)-1); 126 127} 128 129void 130UnifiedRenameMap::switchFreeList(UnifiedFreeList* freeList) 131{ 132 if (vecMode == Enums::Elem) { --- 81 unchanged lines hidden --- |