rename_impl.hh (9938:d3b7970e1b33) rename_impl.hh (9944:4ff1c5c6dcbc)
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Kevin Lim
42 * Korey Sewell
43 */
44
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Kevin Lim
42 * Korey Sewell
43 */
44
45#ifndef __CPU_O3_RENAME_IMPL_HH__
46#define __CPU_O3_RENAME_IMPL_HH__
47
45#include <list>
46
47#include "arch/isa_traits.hh"
48#include "arch/registers.hh"
49#include "config/the_isa.hh"
50#include "cpu/o3/rename.hh"
51#include "cpu/reg_class.hh"
52#include "debug/Activity.hh"

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1378 cprintf("Seq num: %i\nArch reg: %i New phys reg: %i Old phys "
1379 "reg: %i\n", (*buf_it).instSeqNum, (int)(*buf_it).archReg,
1380 (int)(*buf_it).newPhysReg, (int)(*buf_it).prevPhysReg);
1381
1382 buf_it++;
1383 }
1384 }
1385}
48#include <list>
49
50#include "arch/isa_traits.hh"
51#include "arch/registers.hh"
52#include "config/the_isa.hh"
53#include "cpu/o3/rename.hh"
54#include "cpu/reg_class.hh"
55#include "debug/Activity.hh"

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1381 cprintf("Seq num: %i\nArch reg: %i New phys reg: %i Old phys "
1382 "reg: %i\n", (*buf_it).instSeqNum, (int)(*buf_it).archReg,
1383 (int)(*buf_it).newPhysReg, (int)(*buf_it).prevPhysReg);
1384
1385 buf_it++;
1386 }
1387 }
1388}
1389
1390#endif//__CPU_O3_RENAME_IMPL_HH__