rename_impl.hh (7649:a6a6177a5ffa) rename_impl.hh (7720:65d338a8dba4)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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586
587 assert(!insts_to_rename.empty());
588
589 inst = insts_to_rename.front();
590
591 insts_to_rename.pop_front();
592
593 if (renameStatus[tid] == Unblocking) {
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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586
587 assert(!insts_to_rename.empty());
588
589 inst = insts_to_rename.front();
590
591 insts_to_rename.pop_front();
592
593 if (renameStatus[tid] == Unblocking) {
594 DPRINTF(Rename,"[tid:%u]: Removing [sn:%lli] PC:%#x from rename "
595 "skidBuffer\n",
596 tid, inst->seqNum, inst->readPC());
594 DPRINTF(Rename,"[tid:%u]: Removing [sn:%lli] PC:%s from rename "
595 "skidBuffer\n", tid, inst->seqNum, inst->pcState());
597 }
598
599 if (inst->isSquashed()) {
596 }
597
598 if (inst->isSquashed()) {
600 DPRINTF(Rename, "[tid:%u]: instruction %i with PC %#x is "
601 "squashed, skipping.\n",
602 tid, inst->seqNum, inst->readPC());
599 DPRINTF(Rename, "[tid:%u]: instruction %i with PC %s is "
600 "squashed, skipping.\n", tid, inst->seqNum,
601 inst->pcState());
603
604 ++renameSquashedInsts;
605
606 // Decrement how many instructions are available.
607 --insts_available;
608
609 continue;
610 }
611
612 DPRINTF(Rename, "[tid:%u]: Processing instruction [sn:%lli] with "
602
603 ++renameSquashedInsts;
604
605 // Decrement how many instructions are available.
606 --insts_available;
607
608 continue;
609 }
610
611 DPRINTF(Rename, "[tid:%u]: Processing instruction [sn:%lli] with "
613 "PC %#x.\n",
614 tid, inst->seqNum, inst->readPC());
612 "PC %s.\n", tid, inst->seqNum, inst->pcState());
615
616 // Handle serializeAfter/serializeBefore instructions.
617 // serializeAfter marks the next instruction as serializeBefore.
618 // serializeBefore makes the instruction wait in rename until the ROB
619 // is empty.
620
621 // In this model, IPR accesses are serialize before
622 // instructions, and store conditionals are serialize after

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711
712 while (!insts[tid].empty()) {
713 inst = insts[tid].front();
714
715 insts[tid].pop_front();
716
717 assert(tid == inst->threadNumber);
718
613
614 // Handle serializeAfter/serializeBefore instructions.
615 // serializeAfter marks the next instruction as serializeBefore.
616 // serializeBefore makes the instruction wait in rename until the ROB
617 // is empty.
618
619 // In this model, IPR accesses are serialize before
620 // instructions, and store conditionals are serialize after

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709
710 while (!insts[tid].empty()) {
711 inst = insts[tid].front();
712
713 insts[tid].pop_front();
714
715 assert(tid == inst->threadNumber);
716
719 DPRINTF(Rename, "[tid:%u]: Inserting [sn:%lli] PC:%#x into Rename "
720 "skidBuffer\n", tid, inst->seqNum, inst->readPC());
717 DPRINTF(Rename, "[tid:%u]: Inserting [sn:%lli] PC: %s into Rename "
718 "skidBuffer\n", tid, inst->seqNum, inst->pcState());
721
722 ++renameSkidInsts;
723
724 skidBuffer[tid].push_back(inst);
725 }
726
727 if (skidBuffer[tid].size() > skidBufferMax)
728 {
729 typename InstQueue::iterator it;
730 warn("Skidbuffer contents:\n");
731 for(it = skidBuffer[tid].begin(); it != skidBuffer[tid].end(); it++)
732 {
733 warn("[tid:%u]: %s [sn:%i].\n", tid,
719
720 ++renameSkidInsts;
721
722 skidBuffer[tid].push_back(inst);
723 }
724
725 if (skidBuffer[tid].size() > skidBufferMax)
726 {
727 typename InstQueue::iterator it;
728 warn("Skidbuffer contents:\n");
729 for(it = skidBuffer[tid].begin(); it != skidBuffer[tid].end(); it++)
730 {
731 warn("[tid:%u]: %s [sn:%i].\n", tid,
734 (*it)->staticInst->disassemble(inst->readPC()),
732 (*it)->staticInst->disassemble(inst->instAddr()),
735 (*it)->seqNum);
736 }
737 panic("Skidbuffer Exceeded Max Size");
738 }
739}
740
741template <class Impl>
742void

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1282
1283 DynInstPtr serial_inst = serializeInst[tid];
1284
1285 renameStatus[tid] = Unblocking;
1286
1287 unblock(tid);
1288
1289 DPRINTF(Rename, "[tid:%u]: Processing instruction [%lli] with "
733 (*it)->seqNum);
734 }
735 panic("Skidbuffer Exceeded Max Size");
736 }
737}
738
739template <class Impl>
740void

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1280
1281 DynInstPtr serial_inst = serializeInst[tid];
1282
1283 renameStatus[tid] = Unblocking;
1284
1285 unblock(tid);
1286
1287 DPRINTF(Rename, "[tid:%u]: Processing instruction [%lli] with "
1290 "PC %#x.\n",
1291 tid, serial_inst->seqNum, serial_inst->readPC());
1288 "PC %s.\n", tid, serial_inst->seqNum, serial_inst->pcState());
1292
1293 // Put instruction into queue here.
1294 serial_inst->clearSerializeBefore();
1295
1296 if (!skidBuffer[tid].empty()) {
1297 skidBuffer[tid].push_front(serial_inst);
1298 } else {
1299 insts[tid].push_front(serial_inst);

--- 68 unchanged lines hidden --- 		1289
1290 // Put instruction into queue here.
1291 serial_inst->clearSerializeBefore();
1292
1293 if (!skidBuffer[tid].empty()) {
1294 skidBuffer[tid].push_front(serial_inst);
1295 } else {
1296 insts[tid].push_front(serial_inst);

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