rename_impl.hh (2935:d1223a6c9156) rename_impl.hh (2980:eab855f06b79)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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29 * Korey Sewell
30 */
31
32#include <list>
33
34#include "config/full_system.hh"
35#include "cpu/o3/rename.hh"
36
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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29 * Korey Sewell
30 */
31
32#include <list>
33
34#include "config/full_system.hh"
35#include "cpu/o3/rename.hh"
36
37using namespace std;
38
39template <class Impl>
40DefaultRename<Impl>::DefaultRename(Params *params)
41 : iewToRenameDelay(params->iewToRenameDelay),
42 decodeToRenameDelay(params->decodeToRenameDelay),
43 commitToRenameDelay(params->commitToRenameDelay),
44 renameWidth(params->renameWidth),
45 commitWidth(params->commitWidth),
46 numThreads(params->numberOfThreads)

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218 freeEntries[tid].lsqEntries = iew_ptr->ldstQueue.numFreeEntries(tid);
219 freeEntries[tid].robEntries = commit_ptr->numROBFreeEntries(tid);
220 emptyROB[tid] = true;
221 }
222}
223
224template<class Impl>
225void
37template <class Impl>
38DefaultRename<Impl>::DefaultRename(Params *params)
39 : iewToRenameDelay(params->iewToRenameDelay),
40 decodeToRenameDelay(params->decodeToRenameDelay),
41 commitToRenameDelay(params->commitToRenameDelay),
42 renameWidth(params->renameWidth),
43 commitWidth(params->commitWidth),
44 numThreads(params->numberOfThreads)

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216 freeEntries[tid].lsqEntries = iew_ptr->ldstQueue.numFreeEntries(tid);
217 freeEntries[tid].robEntries = commit_ptr->numROBFreeEntries(tid);
218 emptyROB[tid] = true;
219 }
220}
221
222template<class Impl>
223void
226DefaultRename::setActiveThreads(list *at_ptr)
224DefaultRename<Impl>::setActiveThreads(std::list<unsigned> *at_ptr)
227{
228 DPRINTF(Rename, "Setting active threads list pointer.\n");
229 activeThreads = at_ptr;
230}
231
232
233template <class Impl>
234void

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267}
268
269template <class Impl>
270void
271DefaultRename<Impl>::switchOut()
272{
273 // Clear any state, fix up the rename map.
274 for (int i = 0; i < numThreads; i++) {
225{
226 DPRINTF(Rename, "Setting active threads list pointer.\n");
227 activeThreads = at_ptr;
228}
229
230
231template <class Impl>
232void

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265}
266
267template <class Impl>
268void
269DefaultRename<Impl>::switchOut()
270{
271 // Clear any state, fix up the rename map.
272 for (int i = 0; i < numThreads; i++) {
275 typename list<RenameHistory>::iterator hb_it = historyBuffer[i].begin();
273 typename std::list<RenameHistory>::iterator hb_it =
274 historyBuffer[i].begin();
276
277 while (!historyBuffer[i].empty()) {
278 assert(hb_it != historyBuffer[i].end());
279
280 DPRINTF(Rename, "[tid:%u]: Removing history entry with sequence "
281 "number %i.\n", i, (*hb_it).instSeqNum);
282
283 // Tell the rename map to set the architected register to the

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402 blockThisCycle = false;
403
404 bool status_change = false;
405
406 toIEWIndex = 0;
407
408 sortInsts();
409
275
276 while (!historyBuffer[i].empty()) {
277 assert(hb_it != historyBuffer[i].end());
278
279 DPRINTF(Rename, "[tid:%u]: Removing history entry with sequence "
280 "number %i.\n", i, (*hb_it).instSeqNum);
281
282 // Tell the rename map to set the architected register to the

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401 blockThisCycle = false;
402
403 bool status_change = false;
404
405 toIEWIndex = 0;
406
407 sortInsts();
408
410 list::iterator threads = (*activeThreads).begin();
409 std::list<unsigned>::iterator threads = (*activeThreads).begin();
411
412 // Check stall and squash signals.
413 while (threads != (*activeThreads).end()) {
414 unsigned tid = *threads++;
415
416 DPRINTF(Rename, "Processing [tid:%i]\n", tid);
417
418 status_change = checkSignalsAndUpdate(tid) || status_change;

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754 insts[inst->threadNumber].push_back(inst);
755 }
756}
757
758template<class Impl>
759bool
760DefaultRename<Impl>::skidsEmpty()
761{
410
411 // Check stall and squash signals.
412 while (threads != (*activeThreads).end()) {
413 unsigned tid = *threads++;
414
415 DPRINTF(Rename, "Processing [tid:%i]\n", tid);
416
417 status_change = checkSignalsAndUpdate(tid) || status_change;

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753 insts[inst->threadNumber].push_back(inst);
754 }
755}
756
757template<class Impl>
758bool
759DefaultRename<Impl>::skidsEmpty()
760{
762 list::iterator threads = (*activeThreads).begin();
761 std::list<unsigned>::iterator threads = (*activeThreads).begin();
763
764 while (threads != (*activeThreads).end()) {
765 if (!skidBuffer[*threads++].empty())
766 return false;
767 }
768
769 return true;
770}
771
772template<class Impl>
773void
774DefaultRename<Impl>::updateStatus()
775{
776 bool any_unblocking = false;
777
762
763 while (threads != (*activeThreads).end()) {
764 if (!skidBuffer[*threads++].empty())
765 return false;
766 }
767
768 return true;
769}
770
771template<class Impl>
772void
773DefaultRename<Impl>::updateStatus()
774{
775 bool any_unblocking = false;
776
778 list::iterator threads = (*activeThreads).begin();
777 std::list<unsigned>::iterator threads = (*activeThreads).begin();
779
780 threads = (*activeThreads).begin();
781
782 while (threads != (*activeThreads).end()) {
783 unsigned tid = *threads++;
784
785 if (renameStatus[tid] == Unblocking) {
786 any_unblocking = true;

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860
861 return false;
862}
863
864template <class Impl>
865void
866DefaultRename<Impl>::doSquash(const InstSeqNum &squashed_seq_num, unsigned tid)
867{
778
779 threads = (*activeThreads).begin();
780
781 while (threads != (*activeThreads).end()) {
782 unsigned tid = *threads++;
783
784 if (renameStatus[tid] == Unblocking) {
785 any_unblocking = true;

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859
860 return false;
861}
862
863template <class Impl>
864void
865DefaultRename<Impl>::doSquash(const InstSeqNum &squashed_seq_num, unsigned tid)
866{
868 typename list<RenameHistory>::iterator hb_it = historyBuffer[tid].begin();
867 typename std::list<RenameHistory>::iterator hb_it =
868 historyBuffer[tid].begin();
869
870 // After a syscall squashes everything, the history buffer may be empty
871 // but the ROB may still be squashing instructions.
872 if (historyBuffer[tid].empty()) {
873 return;
874 }
875
876 // Go through the most recent instructions, undoing the mappings

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898template<class Impl>
899void
900DefaultRename<Impl>::removeFromHistory(InstSeqNum inst_seq_num, unsigned tid)
901{
902 DPRINTF(Rename, "[tid:%u]: Removing a committed instruction from the "
903 "history buffer %u (size=%i), until [sn:%lli].\n",
904 tid, tid, historyBuffer[tid].size(), inst_seq_num);
905
869
870 // After a syscall squashes everything, the history buffer may be empty
871 // but the ROB may still be squashing instructions.
872 if (historyBuffer[tid].empty()) {
873 return;
874 }
875
876 // Go through the most recent instructions, undoing the mappings

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898template<class Impl>
899void
900DefaultRename<Impl>::removeFromHistory(InstSeqNum inst_seq_num, unsigned tid)
901{
902 DPRINTF(Rename, "[tid:%u]: Removing a committed instruction from the "
903 "history buffer %u (size=%i), until [sn:%lli].\n",
904 tid, tid, historyBuffer[tid].size(), inst_seq_num);
905
906 typename list<RenameHistory>::iterator hb_it = historyBuffer[tid].end();
906 typename std::list<RenameHistory>::iterator hb_it =
907 historyBuffer[tid].end();
907
908 --hb_it;
909
910 if (historyBuffer[tid].empty()) {
911 DPRINTF(Rename, "[tid:%u]: History buffer is empty.\n", tid);
912 return;
913 } else if (hb_it->instSeqNum > inst_seq_num) {
914 DPRINTF(Rename, "[tid:%u]: Old sequence number encountered. Ensure "

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1297 break;
1298 }
1299}
1300
1301template <class Impl>
1302void
1303DefaultRename<Impl>::dumpHistory()
1304{
908
909 --hb_it;
910
911 if (historyBuffer[tid].empty()) {
912 DPRINTF(Rename, "[tid:%u]: History buffer is empty.\n", tid);
913 return;
914 } else if (hb_it->instSeqNum > inst_seq_num) {
915 DPRINTF(Rename, "[tid:%u]: Old sequence number encountered. Ensure "

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1298 break;
1299 }
1300}
1301
1302template <class Impl>
1303void
1304DefaultRename<Impl>::dumpHistory()
1305{
1305 typename list::iterator buf_it;
1306 typename std::list<RenameHistory>::iterator buf_it;
1306
1307 for (int i = 0; i < numThreads; i++) {
1308
1309 buf_it = historyBuffer[i].begin();
1310
1311 while (buf_it != historyBuffer[i].end()) {
1312 cprintf("Seq num: %i\nArch reg: %i New phys reg: %i Old phys "
1313 "reg: %i\n", (*buf_it).instSeqNum, (int)(*buf_it).archReg,
1314 (int)(*buf_it).newPhysReg, (int)(*buf_it).prevPhysReg);
1315
1316 buf_it++;
1317 }
1318 }
1319}
1307
1308 for (int i = 0; i < numThreads; i++) {
1309
1310 buf_it = historyBuffer[i].begin();
1311
1312 while (buf_it != historyBuffer[i].end()) {
1313 cprintf("Seq num: %i\nArch reg: %i New phys reg: %i Old phys "
1314 "reg: %i\n", (*buf_it).instSeqNum, (int)(*buf_it).archReg,
1315 (int)(*buf_it).newPhysReg, (int)(*buf_it).prevPhysReg);
1316
1317 buf_it++;
1318 }
1319 }
1320}