rename_impl.hh (10239:592f0bb6bd6f) rename_impl.hh (10328:867b536a68be)
1/*
1/*
2 * Copyright (c) 2010-2012 ARM Limited
2 * Copyright (c) 2010-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

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72 + params->numPhysCCRegs)
73{
74 if (renameWidth > Impl::MaxWidth)
75 fatal("renameWidth (%d) is larger than compiled limit (%d),\n"
76 "\tincrease MaxWidth in src/cpu/o3/impl.hh\n",
77 renameWidth, static_cast<int>(Impl::MaxWidth));
78
79 // @todo: Make into a parameter.
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

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72 + params->numPhysCCRegs)
73{
74 if (renameWidth > Impl::MaxWidth)
75 fatal("renameWidth (%d) is larger than compiled limit (%d),\n"
76 "\tincrease MaxWidth in src/cpu/o3/impl.hh\n",
77 renameWidth, static_cast<int>(Impl::MaxWidth));
78
79 // @todo: Make into a parameter.
80 skidBufferMax = (2 * (decodeToRenameDelay * params->decodeWidth)) + renameWidth;
80 skidBufferMax = (decodeToRenameDelay + 1) * params->decodeWidth;
81}
82
83template <class Impl>
84std::string
85DefaultRename<Impl>::name() const
86{
87 return cpu->name() + ".rename";
88}

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242
243 freeEntries[tid].iqEntries = iew_ptr->instQueue.numFreeEntries(tid);
244 freeEntries[tid].lqEntries = iew_ptr->ldstQueue.numFreeLoadEntries(tid);
245 freeEntries[tid].sqEntries = iew_ptr->ldstQueue.numFreeStoreEntries(tid);
246 freeEntries[tid].robEntries = commit_ptr->numROBFreeEntries(tid);
247 emptyROB[tid] = true;
248
249 stalls[tid].iew = false;
81}
82
83template <class Impl>
84std::string
85DefaultRename<Impl>::name() const
86{
87 return cpu->name() + ".rename";
88}

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242
243 freeEntries[tid].iqEntries = iew_ptr->instQueue.numFreeEntries(tid);
244 freeEntries[tid].lqEntries = iew_ptr->ldstQueue.numFreeLoadEntries(tid);
245 freeEntries[tid].sqEntries = iew_ptr->ldstQueue.numFreeStoreEntries(tid);
246 freeEntries[tid].robEntries = commit_ptr->numROBFreeEntries(tid);
247 emptyROB[tid] = true;
248
249 stalls[tid].iew = false;
250 stalls[tid].commit = false;
251 serializeInst[tid] = NULL;
252
253 instsInProgress[tid] = 0;
254 loadsInProgress[tid] = 0;
255 storesInProgress[tid] = 0;
256
257 serializeOnNextInst[tid] = false;
258 }

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1195 if (fromIEW->iewBlock[tid]) {
1196 stalls[tid].iew = true;
1197 }
1198
1199 if (fromIEW->iewUnblock[tid]) {
1200 assert(stalls[tid].iew);
1201 stalls[tid].iew = false;
1202 }
250 serializeInst[tid] = NULL;
251
252 instsInProgress[tid] = 0;
253 loadsInProgress[tid] = 0;
254 storesInProgress[tid] = 0;
255
256 serializeOnNextInst[tid] = false;
257 }

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1194 if (fromIEW->iewBlock[tid]) {
1195 stalls[tid].iew = true;
1196 }
1197
1198 if (fromIEW->iewUnblock[tid]) {
1199 assert(stalls[tid].iew);
1200 stalls[tid].iew = false;
1201 }
1203
1204 if (fromCommit->commitBlock[tid]) {
1205 stalls[tid].commit = true;
1206 }
1207
1208 if (fromCommit->commitUnblock[tid]) {
1209 assert(stalls[tid].commit);
1210 stalls[tid].commit = false;
1211 }
1212}
1213
1214template <class Impl>
1215bool
1216DefaultRename<Impl>::checkStall(ThreadID tid)
1217{
1218 bool ret_val = false;
1219
1220 if (stalls[tid].iew) {
1221 DPRINTF(Rename,"[tid:%i]: Stall from IEW stage detected.\n", tid);
1222 ret_val = true;
1202}
1203
1204template <class Impl>
1205bool
1206DefaultRename<Impl>::checkStall(ThreadID tid)
1207{
1208 bool ret_val = false;
1209
1210 if (stalls[tid].iew) {
1211 DPRINTF(Rename,"[tid:%i]: Stall from IEW stage detected.\n", tid);
1212 ret_val = true;
1223 } else if (stalls[tid].commit) {
1224 DPRINTF(Rename,"[tid:%i]: Stall from Commit stage detected.\n", tid);
1225 ret_val = true;
1226 } else if (calcFreeROBEntries(tid) <= 0) {
1227 DPRINTF(Rename,"[tid:%i]: Stall: ROB has 0 free entries.\n", tid);
1228 ret_val = true;
1229 } else if (calcFreeIQEntries(tid) <= 0) {
1230 DPRINTF(Rename,"[tid:%i]: Stall: IQ has 0 free entries.\n", tid);
1231 ret_val = true;
1232 } else if (calcFreeLQEntries(tid) <= 0 && calcFreeSQEntries(tid) <= 0) {
1233 DPRINTF(Rename,"[tid:%i]: Stall: LSQ has 0 free entries.\n", tid);

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1297 DPRINTF(Rename, "[tid:%u]: Squashing instructions due to squash from "
1298 "commit.\n", tid);
1299
1300 squash(fromCommit->commitInfo[tid].doneSeqNum, tid);
1301
1302 return true;
1303 }
1304
1213 } else if (calcFreeROBEntries(tid) <= 0) {
1214 DPRINTF(Rename,"[tid:%i]: Stall: ROB has 0 free entries.\n", tid);
1215 ret_val = true;
1216 } else if (calcFreeIQEntries(tid) <= 0) {
1217 DPRINTF(Rename,"[tid:%i]: Stall: IQ has 0 free entries.\n", tid);
1218 ret_val = true;
1219 } else if (calcFreeLQEntries(tid) <= 0 && calcFreeSQEntries(tid) <= 0) {
1220 DPRINTF(Rename,"[tid:%i]: Stall: LSQ has 0 free entries.\n", tid);

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1284 DPRINTF(Rename, "[tid:%u]: Squashing instructions due to squash from "
1285 "commit.\n", tid);
1286
1287 squash(fromCommit->commitInfo[tid].doneSeqNum, tid);
1288
1289 return true;
1290 }
1291
1305 if (fromCommit->commitInfo[tid].robSquashing) {
1306 DPRINTF(Rename, "[tid:%u]: ROB is still squashing.\n", tid);
1307
1308 renameStatus[tid] = Squashing;
1309
1310 return true;
1311 }
1312
1313 if (checkStall(tid)) {
1314 return block(tid);
1315 }
1316
1317 if (renameStatus[tid] == Blocked) {
1318 DPRINTF(Rename, "[tid:%u]: Done blocking, switching to unblocking.\n",
1319 tid);
1320

--- 124 unchanged lines hidden --- 		1292 if (checkStall(tid)) {
1293 return block(tid);
1294 }
1295
1296 if (renameStatus[tid] == Blocked) {
1297 DPRINTF(Rename, "[tid:%u]: Done blocking, switching to unblocking.\n",
1298 tid);
1299

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