rename_impl.hh (12109:f29e9c5418aa) | rename_impl.hh (12144:3f2976f87529) |
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1/* 2 * Copyright (c) 2010-2012, 2014-2016 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 1014 unchanged lines hidden (view full) --- 1023 renamed_reg = map->lookup(tc->flattenRegId(src_reg)); 1024 switch (src_reg.classValue()) { 1025 case IntRegClass: 1026 intRenameLookups++; 1027 break; 1028 case FloatRegClass: 1029 fpRenameLookups++; 1030 break; | 1/* 2 * Copyright (c) 2010-2012, 2014-2016 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 1014 unchanged lines hidden (view full) --- 1023 renamed_reg = map->lookup(tc->flattenRegId(src_reg)); 1024 switch (src_reg.classValue()) { 1025 case IntRegClass: 1026 intRenameLookups++; 1027 break; 1028 case FloatRegClass: 1029 fpRenameLookups++; 1030 break; |
1031 case VecRegClass: 1032 vecRenameLookups++; 1033 break; |
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1031 case CCRegClass: 1032 case MiscRegClass: 1033 break; 1034 1035 default: 1036 panic("Invalid register class: %d.", src_reg.classValue()); 1037 } 1038 --- 387 unchanged lines hidden --- | 1034 case CCRegClass: 1035 case MiscRegClass: 1036 break; 1037 1038 default: 1039 panic("Invalid register class: %d.", src_reg.classValue()); 1040 } 1041 --- 387 unchanged lines hidden --- |