1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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60DefaultRename<Impl>::DefaultRename(O3CPU *_cpu, DerivO3CPUParams *params)
61 : cpu(_cpu),
62 iewToRenameDelay(params->iewToRenameDelay),
63 decodeToRenameDelay(params->decodeToRenameDelay),
64 commitToRenameDelay(params->commitToRenameDelay),
65 renameWidth(params->renameWidth),
66 commitWidth(params->commitWidth),
67 numThreads(params->numThreads),
68 maxPhysicalRegs(params->numPhysIntRegs + params->numPhysFloatRegs)
69{
70 // @todo: Make into a parameter.
71 skidBufferMax = (2 * (decodeToRenameDelay * params->decodeWidth)) + renameWidth;
72}
73
74template <class Impl>
75std::string
76DefaultRename<Impl>::name() const

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969 break;
970
971 case FloatRegClass:
972 flat_rel_src_reg = tc->flattenFloatIndex(rel_src_reg);
973 renamed_reg = map->lookupFloat(flat_rel_src_reg);
974 fpRenameLookups++;
975 break;
976
977 case MiscRegClass:
978 // misc regs don't get flattened
979 flat_rel_src_reg = rel_src_reg;
980 renamed_reg = map->lookupMisc(flat_rel_src_reg);
981 break;
982
983 default:
984 panic("Reg index is out of bound: %d.", src_reg);

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1029 break;
1030
1031 case FloatRegClass:
1032 flat_rel_dest_reg = tc->flattenFloatIndex(rel_dest_reg);
1033 rename_result = map->renameFloat(flat_rel_dest_reg);
1034 flat_uni_dest_reg = flat_rel_dest_reg + TheISA::FP_Reg_Base;
1035 break;
1036
1037 case MiscRegClass:
1038 // misc regs don't get flattened
1039 flat_rel_dest_reg = rel_dest_reg;
1040 rename_result = map->renameMisc(flat_rel_dest_reg);
1041 flat_uni_dest_reg = flat_rel_dest_reg + TheISA::Misc_Reg_Base;
1042 break;
1043
1044 default:

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