1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1209
1210 return ret_val;
1211}
1212
1213template <class Impl>
1214void
1215DefaultRename<Impl>::readFreeEntries(ThreadID tid)
1216{
1217 bool updated = false;
1218 if (fromIEW->iewInfo[tid].usedIQ) {
1219 freeEntries[tid].iqEntries =
1220 fromIEW->iewInfo[tid].freeIQEntries;
1221 updated = true;
1222 }
1223
1224 if (fromIEW->iewInfo[tid].usedLSQ) {
1225 freeEntries[tid].lsqEntries =
1226 fromIEW->iewInfo[tid].freeLSQEntries;
1227 updated = true;
1228 }
1229
1230 if (fromCommit->commitInfo[tid].usedROB) {
1231 freeEntries[tid].robEntries =
1232 fromCommit->commitInfo[tid].freeROBEntries;
1233 emptyROB[tid] = fromCommit->commitInfo[tid].emptyROB;
1234 updated = true;
1235 }
1236
1237 DPRINTF(Rename, "[tid:%i]: Free IQ: %i, Free ROB: %i, Free LSQ: %i\n",
1238 tid,
1239 freeEntries[tid].iqEntries,
1240 freeEntries[tid].robEntries,
1241 freeEntries[tid].lsqEntries);
1242

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