1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1210
1211 return ret_val;
1212}
1213
1214template <class Impl>
1215void
1216DefaultRename<Impl>::readFreeEntries(ThreadID tid)
1217{
1218 bool updated = false;
1219 if (fromIEW->iewInfo[tid].usedIQ) {
1220 freeEntries[tid].iqEntries =
1221 fromIEW->iewInfo[tid].freeIQEntries;
1222 updated = true;
1223 }
1224
1225 if (fromIEW->iewInfo[tid].usedLSQ) {
1226 freeEntries[tid].lsqEntries =
1227 fromIEW->iewInfo[tid].freeLSQEntries;
1228 updated = true;
1229 }
1230
1231 if (fromCommit->commitInfo[tid].usedROB) {
1232 freeEntries[tid].robEntries =
1233 fromCommit->commitInfo[tid].freeROBEntries;
1234 emptyROB[tid] = fromCommit->commitInfo[tid].emptyROB;
1235 updated = true;
1236 }
1237
1238 DPRINTF(Rename, "[tid:%i]: Free IQ: %i, Free ROB: %i, Free LSQ: %i\n",
1239 tid,
1240 freeEntries[tid].iqEntries,
1241 freeEntries[tid].robEntries,
1242 freeEntries[tid].lsqEntries);
1243

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