1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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174 .desc("count of temporary serializing insts renamed")
175 .flags(Stats::total)
176 ;
177 renameSkidInsts
178 .name(name() + ".RENAME:skidInsts")
179 .desc("count of insts added to the skid buffer")
180 .flags(Stats::total)
181 ;
182}
183
184template <class Impl>
185void
186DefaultRename<Impl>::setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr)
187{
188 timeBuffer = tb_ptr;
189

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1007
1008 inst->markSrcRegReady(src_idx);
1009 } else {
1010 DPRINTF(Rename, "[tid:%u]: Register %d is not ready.\n",
1011 tid, renamed_reg);
1012 }
1013
1014 ++renameRenameLookups;
1015 }
1016}
1017
1018template <class Impl>
1019inline void
1020DefaultRename<Impl>::renameDestRegs(DynInstPtr &inst, ThreadID tid)
1021{
1022 typename RenameMap::RenameInfo rename_result;

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